| 097 / 2 |
Designing an Ultralow-Voltage Phase-Locked Loop Using a Bulk-Driven Technique
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#04.優質教育 #09.產業創新與基礎設施
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2017-01-04 |
| 098 / 1 |
Inductorless CMOS Receiver Front-End Circuits for 10-Gb/s Optical Communications
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#04.優質教育 #09.產業創新與基礎設施
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2017-01-13 |
| 099 / 1 |
High Efficiency Concurrent Embedded Block Coding Architecture for JPEG 2000
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#04.優質教育 #09.產業創新與基礎設施
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2017-01-13 |
| 099 / 1 |
A 0.5 V 320 MHz 8 bit×8 bit pipelined multiplier in 130 nm CMOS process
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#04.優質教育 #09.產業創新與基礎設施
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2013-10-30 |
| 091 / 2 |
Circuit analysis and design of low-power CMOS tapered buffer
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#04.優質教育 #07.可負擔的潔淨能源 #09.產業創新與基礎設施
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2013-12-31 |
| 092 / 1 |
A Dual-Slope Phase Frequency Detector and Charge Pump Architecture to Achieve Fast Locking of Phase-Locked Loop
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#04.優質教育 #09.產業創新與基礎設施
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2014-03-28 |
| 093 / 1 |
低功率多輸出入埠暫存器檔案之分析與設計
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#04.優質教育 #07.可負擔的潔淨能源 #09.產業創新與基礎設施
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2012-07-02 |
| 093 / 1 |
動態調整電源電壓與操作頻率以降低系統晶片之功率消耗
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#04.優質教育 #07.可負擔的潔淨能源 #09.產業創新與基礎設施
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2012-07-02 |
| 097 / 2 |
High-Speed and Ultra-Low-Voltage Divide-by-4/5 Counter for Frequency Synthesizer
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#04.優質教育 #07.可負擔的潔淨能源 #09.產業創新與基礎設施
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2013-11-08 |
| 098 / 2 |
A Pseudo Fractional-N Clock Generator with 50% Duty Cycle Output
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#04.優質教育 #09.產業創新與基礎設施
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2013-11-08 |
| 099 / 1 |
The High-Performance and Low-Power CMOS Output Driver Design
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#04.優質教育 #07.可負擔的潔淨能源 #09.產業創新與基礎設施
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2013-11-08 |
| 101 / 1 |
Low-Power Fast-Settling Low-Dropout Regulator Using a Digitally Assisted Voltage Accelerator for DVFS Application
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#04.優質教育 #07.可負擔的潔淨能源 #09.產業創新與基礎設施
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2017-02-15 |
| 101 / 2 |
A new phase interpolator circuit for frequency multiplication design in embedded system
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#04.優質教育 #09.產業創新與基礎設施
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2016-12-05 |
| 102 / 1 |
A multiple frequency clock generator using wide operation frequency range phase interpolator
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#04.優質教育 #09.產業創新與基礎設施
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2017-12-18 |
| 100 / 1 |
A synthesizable pseudo fractional-N clock generator with improved duty cycle output
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#04.優質教育 #09.產業創新與基礎設施
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2014-03-07 |
| 103 / 2 |
A Robust Oscillator for Embedded System without External Crystal
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#04.優質教育 #09.產業創新與基礎設施
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2018-09-04 |
| 087 / 2 |
The charge-transfer feedback-controlled split-path CMOS buffer
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#04.優質教育 #09.產業創新與基礎設施
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2015-06-16 |
| 104 / 2 |
A 25 MHz crystal less clock generator with background calibration against process and temperature variation
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#04.優質教育 #09.產業創新與基礎設施
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2017-10-24 |
| 104 / 2 |
A High-Resolution All-Digital Temperature Sensor with Process Variation Compensation
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#04.優質教育 #09.產業創新與基礎設施
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2016-11-22 |
| 104 / 2 |
A High-Resolution All-Digital Temperature Sensor with Process Variation Compensation
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#04.優質教育 #09.產業創新與基礎設施
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2019-08-20 |
| 106 / 1 |
Wide‑range CMOS reference clock generator with a dynamic duty cycle scaling mechanism at a 0.9‑V supply voltage
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#04.優質教育 #07.可負擔的潔淨能源 #09.產業創新與基礎設施
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2018-09-04 |
| 106 / 1 |
A Fast-Lock and Low-Power DLL-Based Clock Generator Applied for DDR4
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#04.優質教育 #07.可負擔的潔淨能源 #09.產業創新與基礎設施
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2019-08-20 |
| 105 / 1 |
All-digital duty-cycle corrector with synchronous and high accuracy output for double date rate synchronous dynamic random-access memory application
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#04.優質教育 #08.尊嚴就業與經濟發展 #09.產業創新與基礎設施
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2019-08-28 |
| 106 / 1 |
A Selectable Discrete-Voltage Output and Fast-Settling Low-Dropout Regulator Using Half Digitally-Assistant Voltage Accelerator
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#04.優質教育 #09.產業創新與基礎設施
|
2019-08-28 |
| 106 / 1 |
Design of Fast-Locked Digitally Controlled Low-Dropout Regulator for Ultra-low Voltage Input
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#04.優質教育 #09.產業創新與基礎設施
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2022-12-21 |
| 107 / 2 |
A Fast Transient Response and High Current Efficiency Output-Capacitorless Low Dropout Regulator for Low-Power SoC Applications
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#04.優質教育 #07.可負擔的潔淨能源 #09.產業創新與基礎設施
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2022-12-21 |
| 108 / 2 |
A fast-locking all-digital PLL with dynamic loop gain control and phase self-alignment mechanism for sub-GHz IoT applications
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#04.優質教育 #08.尊嚴就業與經濟發展 #09.產業創新與基礎設施
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2022-12-21 |
| 110 / 1 |
Asynchronous Digital Low-Dropout Regulator with Dual Adjustment Mode in Ultra-Low Voltage Input
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#01.消除貧窮 #04.優質教育
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2022-12-21 |
| 111 / 1 |
A Programmable Multiple Frequencies Clock Generator with Process and Temperature Compensation Circuit for System on Chip Design
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#01.消除貧窮 #04.優質教育 #09.產業創新與基礎設施
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2023-07-17 |
| 112 / 2 |
A High-Efficiency and Wide-Load Current Range LDO with Dynamic Loop Gain Control Technique
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2024-03-08 |
| 112 / 2 |
A High-Efficiency and Wide-Load Current Range LDO with Dynamic Loop Gain Control Technique
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2024-08-01 |
| 112 / 2 |
A High-Efficiency and Wide-Load Current Range LDO with Dynamic Loop Gain Control Technique
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2024-08-05 |