期刊論文

標題 Low-Power Fast-Settling Low-Dropout Regulator Using a Digitally Assisted Voltage Accelerator for DVFS Application
學年 101
學期 1
出版(發表)日期 2013/01/01
作品名稱 Low-Power Fast-Settling Low-Dropout Regulator Using a Digitally Assisted Voltage Accelerator for DVFS Application
作品名稱(其他語言)
著者 Yang, Wei-Bin; Wang, Chi Hsiung; Chang, Hsiang Hsiung; Hong, Ming Hao; Shen, Jsung Mo
單位 淡江大學電機工程學系
出版者 Switzerland: Trans Tech Publications
著錄名稱、卷期、頁數 Applied Mechanics and Materials 284-287, pp.2526-2530
摘要 This paper presents a low-power fast-settling low-dropout regulator (LDO) using a digitally assisted voltage accelerator. Using the selectable-voltage control technique and digitally assisted voltage accelerator significantly improves the transition response time within output voltage switched. The proposed LDO regulator uses the selectable-voltage control technique to provide two selectable-voltage outputs of 2.5 V and 1.8 V. Using the digitally assisted voltage accelerator when the output voltage is switched reduces the settling time. The simulation results show that the settling time of the proposed LDO regulator is significantly reduced from 4.2 ms to 15.5 μs. Moreover, the selectable-voltage control unit and the digitally assisted voltage accelerator of the proposed LDO regulator consume only 0.54 mW under a load current of 100 mA. Therefore, the proposed LDO regulator is suitable for low-power dynamic voltage and frequency-scaling applications.
關鍵字
語言 英文(美國)
ISSN 1660-9336
期刊性質 國外
收錄於 EI;
產學合作
通訊作者
審稿制度
國別 瑞士
公開徵稿
出版型式 ,紙本