期刊論文
| 學年 | 110 |
|---|---|
| 學期 | 1 |
| 出版（發表）日期 | 2021-12-03 |
| 作品名稱 | Asynchronous Digital Low-Dropout Regulator with Dual Adjustment Mode in Ultra-Low Voltage Input |
| 作品名稱（其他語言） | |
| 著者 | Wei-Bin Yang; Chi-Hsuan Sun; Diptendu Sinha Roy; Yi-Mei Chen |
| 單位 | |
| 出版者 | |
| 著錄名稱、卷期、頁數 | IEEE ACCESS 9, p.157563-157570 |
| 摘要 | This paper presents the asynchronous digital low-dropout regulator (AD-LDO) with dual adjustment mode in ultra-low voltage input. The architecture of the proposed AD-LDO consists of the asynchronous control loop and the power PMOS array. The proposed AD-LDO is controlled by switched bidirectional asynchronous control loop which can eliminate the clock power consumption of synchronous LDO. The dual adjustment mode can not only provide wider loading current, but also can reduce output voltage ripple. Moreover, the proposed AD-LDO only uses one bidirectional asynchronous control loop for two adjustment modes, so it can save area and reduce power consumption. Under the 350mV input voltage and 300mV output voltage, the proposed AD-LDO can provide 2.4mA output current with 99.8% current efficiency and only consume 5 μA quiescent current. Therefore, the proposed LDO is suitable for applications of wearable electronic devices with an ultra-low supply voltage. |
| 關鍵字 | Voltage control;Codes;Power demand;Clocks;Regulators;Shift registers;Digital control |
| 語言 | en_US |
| ISSN | 2169-3536 |
| 期刊性質 | 國外 |
| 收錄於 | SCI |
| 產學合作 | |
| 通訊作者 | [31] Wei-Bin Yang |
| 審稿制度 | 是 |
| 國別 | USA |
| 公開徵稿 | |
| 出版型式 | ,電子版 |
| 相關連結 |
機構典藏連結 ( http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/123321 ) |