| 094 / 1 |
The New Approach of Programmable Pseudo Fractional-N Clock Generator for GHz Operation with 50% Duty Cycle
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#04.優質教育 #09.產業創新與基礎設施
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2014-08-22 |
| 098 / 1 |
A Multi-Voltage Control Technique with Fast-Settling Mechanism for Low Dropout Regulator
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#04.優質教育 #09.產業創新與基礎設施
|
2014-09-09 |
| 097 / 1 |
A 320-MHz 8bit × 8bit pipelined multiplier in ultra-low supply voltage
|
#04.優質教育 #07.可負擔的潔淨能源 #09.產業創新與基礎設施
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2014-09-09 |
| 095 / 2 |
New Power Gating Structure with Low Voltage Fluctuations by Bulk Controller in Transition Mode
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#04.優質教育 #09.產業創新與基礎設施
|
2014-09-09 |
| 094 / 2 |
The new improved pseudo fractional-N clock generator with 50% duty cycle
|
#04.優質教育 #09.產業創新與基礎設施
|
2014-09-09 |
| 098 / 1 |
A Pseudo Fractional-N and Multiplier Clock Generator with 50% Duty Cycle Output Using Low Power Phase Combination Controller
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#04.優質教育 #07.可負擔的潔淨能源 #09.產業創新與基礎設施
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2014-09-09 |
| 098 / 1 |
Designing Ultra-Low Voltage PLL Using a Bulk-Driven Technique
|
#04.優質教育 #07.可負擔的潔淨能源 #09.產業創新與基礎設施
|
2014-09-09 |
| 095 / 1 |
A New Dynamic Floating Input D Flip-Flop (DFIDFF) for High Speed and Ultra Low Voltage Divided-by 4/5 Prescaler
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#04.優質教育 #07.可負擔的潔淨能源 #09.產業創新與基礎設施
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2014-09-09 |
| 095 / 1 |
Analysis and Design of High Performance, Low Power Multiple Ports
|
#04.優質教育 #09.產業創新與基礎設施
|
2014-09-09 |
| 095 / 2 |
A 30Phase 500MHz PLL for 3X Over-Sampling Clock Data Recovery
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#04.優質教育 #09.產業創新與基礎設施
|
2014-09-09 |
| 098 / 1 |
A Low Power Multi-Voltage Control Technique with Fast-Settling Mechanism for Low Dropout Regulator
|
#04.優質教育 #07.可負擔的潔淨能源 #09.產業創新與基礎設施
|
2014-09-09 |
| 096 / 2 |
A Spread-Spectrum Clock Generator Using Fractional-N PLL Controlled Delta-Sigma Modulator for Serial-ATA III
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#04.優質教育 #09.產業創新與基礎設施
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2014-09-09 |
| 092 / 2 |
A Dual-slope Phase Frequency Detector and Charge Pump Architecture to Achieve Fast Locking of Phase-Locked Loop
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#04.優質教育 #09.產業創新與基礎設施
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2014-09-09 |
| 099 / 1 |
A New Dynamic Fast-Settling Low Dropout Regulator with Programmable Output Voltage
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#04.優質教育 #09.產業創新與基礎設施
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2012-03-19 |
| 099 / 2 |
The High-Performance and Low-Power CMOS Output Driver Design
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#04.優質教育 #07.可負擔的潔淨能源 #09.產業創新與基礎設施
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2012-07-02 |
| 100 / 1 |
Temperature Insensitive Current Reference for the 6.27 MHz Oscillator
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#04.優質教育 #09.產業創新與基礎設施
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2014-08-13 |
| 100 / 1 |
Supply Voltage and Temperature Insensitive Current Reference for the 4 MHz Oscillator
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#04.優質教育 #09.產業創新與基礎設施
|
2014-08-13 |
| 100 / 1 |
A New Temperature Independent Current Controlled Oscillator
|
#04.優質教育 #07.可負擔的潔淨能源 #09.產業創新與基礎設施
|
2014-08-21 |
| 101 / 1 |
A 300mV 10MHz 4kb 10T Subthreshold SRAM for Ultralow-Power Application
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#04.優質教育 #07.可負擔的潔淨能源 #09.產業創新與基礎設施
|
2014-08-22 |
| 100 / 2 |
A 0.3V 1kb Sub-Threshold SRAM for Ultra-Low-Power Application in 90nm CMOS
|
#04.優質教育 #07.可負擔的潔淨能源 #09.產業創新與基礎設施
|
2014-08-22 |
| 101 / 2 |
A GHz Full-Division-Range Programmable Divider with Output Duty-Cycle Improved
|
#04.優質教育 #09.產業創新與基礎設施
|
2013-04-26 |
| 101 / 2 |
A GHz Full-Division-Range Programmable Divider with Output Duty-Cycle Improved
|
#04.優質教育 #09.產業創新與基礎設施
|
2014-09-22 |
| 101 / 2 |
A 1.8-V 4-ppm oC Reference Current with Process and Temperature
|
#04.優質教育 #09.產業創新與基礎設施
|
2014-07-02 |
| 102 / 2 |
Analysis and Design Considerations of Static CMOS Logics under Process, Voltage and Temperature Variation in 90nm Process
|
#04.優質教育 #09.產業創新與基礎設施
|
2014-05-20 |
| 104 / 1 |
Analysis and Design Considerations of Static CMOS Logics under Process, Voltage and Temperature Variation in UMC 0.18um CMOS Process
|
#04.優質教育 #09.產業創新與基礎設施
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2016-05-16 |
| 102 / 1 |
A 1.8-V Temperature Coefficient is 4.36-ppm/°C Bandgap Reference Current with Process Calibration
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#04.優質教育 #09.產業創新與基礎設施
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2017-12-08 |
| 102 / 2 |
Analysis and Design Considerations of Static CMOS Logics under Process, Voltage and Temperature Variation in 90nm Process
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#04.優質教育 #09.產業創新與基礎設施
|
2017-12-08 |
| 103 / 2 |
A 25MHz Crystal Less Clock Generator with Background Calibration Against Process and Temperature Variation
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#04.優質教育 #09.產業創新與基礎設施
|
2017-12-08 |
| 103 / 2 |
A Transient Enhanced LDO with Current Buffer for SoC Application
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#04.優質教育 #09.產業創新與基礎設施
|
2017-12-11 |
| 104 / 2 |
Wide Range CMOS Reference Clock Generator with Dynamic Duty Cycle Scaling Mechanism in 0.9V Supply Voltage
|
#04.優質教育 #09.產業創新與基礎設施
|
2017-12-11 |
| 104 / 2 |
A fast-lock and low-power Delay-Locked-Loop applied for DDR4
|
#04.優質教育 #07.可負擔的潔淨能源 #09.產業創新與基礎設施
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2017-12-11 |
| 104 / 2 |
A Current-Controlled Oscillator with Temperature, Voltage and Process
|
#04.優質教育 #09.產業創新與基礎設施
|
2017-12-11 |
| 103 / 1 |
A new multiple frequency out of DLL with Glitch Elimination and Phase Interpolator
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#04.優質教育 #09.產業創新與基礎設施
|
2017-12-11 |
| 103 / 1 |
A Sub-1V 0.18um Output-Capacitor-Free Digitally Controlled LDO
|
#04.優質教育 #07.可負擔的潔淨能源 #09.產業創新與基礎設施
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2017-12-11 |
| 105 / 2 |
A 12-bit 600MS/s CT ΣΔ ADC for Ultrasound System Applications
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#04.優質教育 #09.產業創新與基礎設施
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2017-12-11 |
| 106 / 2 |
The design of a crystal-off oscillator with robust on-chip PVT compensation
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#04.優質教育 #09.產業創新與基礎設施
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2018-10-22 |
| 106 / 2 |
Single-Inductor Dual-Output DC-DC Converters with new type ramp and clock generator
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#04.優質教育 #09.產業創新與基礎設施
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2018-10-22 |
| 112 / 1 |
High-Efficiency and Wide-Load Current Range LDO Regulator with Dynamic Loop Gain Control Technique
|
#01.消除貧窮 #04.優質教育
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2023-12-15 |
| 112 / 1 |
A Multi-Stage Dual Mode Digital LDO with Fast Transient Response and Adaptive Frequency
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2023-12-15 |