| 361 |
100-2
|
教學計畫表
|
電機系電機二：電子學 TETCB2E0961 1A
|
| 362 |
101-1
|
教學計畫表
|
電機系電資四：電子實驗 TETAB4E1568 0B
|
| 363 |
100-2
|
教學計畫表
|
電機進學班三：電腦輔助設計 TETXE3E0710 0A
|
| 364 |
100-2
|
教學計畫表
|
電機一博士班：超大型積體電路設計 TETXD1E1185 0A
|
| 365 |
101-1
|
教學計畫表
|
電機一機器人：數位ＩＣ設計 TETEM1E2865 0A
|
| 366 |
100-2
|
教學計畫表
|
電機系電資三：微處理機實驗 TETAB3E1565 0B
|
| 367 |
101-1
|
教學計畫表
|
電機系電機三：電子學 TETCB3E0961 2A
|
| 368 |
100-1
|
研究獎勵
|
A Pseudo Fractional-N Clock Generator with 50% Duty Cycle Output
|
| 369 |
101-1
|
論文指導
|
電機一碩專班 吳誌強
|
| 370 |
101-1
|
論文指導
|
電機一電路組 洪銘皓
|
| 371 |
101-1
|
論文指導
|
電機一碩專班 謝學承
|
| 372 |
101-1
|
論文指導
|
電機一機器人 謝少鈞
|
| 373 |
101-1
|
研發處: 研究計畫 (國科會)
|
具自動補償製程、電壓及溫度漂移之低供應電壓參考時脈振盪器研製
|
| 374 |
100-1
|
研究報告
|
具高可靠度之低電源電壓參考時脈研製
|
| 375 |
99-1
|
期刊論文
|
The High-Performance and Low-Power CMOS Output Driver Design
|
| 376 |
100-1
|
會議論文
|
A New Temperature Independent Current Controlled Oscillator
|
| 377 |
100-1
|
會議論文
|
Supply Voltage and Temperature Insensitive Current Reference for the 4 MHz Oscillator
|
| 378 |
100-1
|
會議論文
|
Temperature Insensitive Current Reference for the 6.27 MHz Oscillator
|
| 379 |
99-2
|
會議論文
|
The High-Performance and Low-Power CMOS Output Driver Design
|
| 380 |
99-1
|
會議論文
|
A New Dynamic Fast-Settling Low Dropout Regulator with Programmable Output Voltage
|
| 381 |
92-2
|
會議論文
|
A Dual-slope Phase Frequency Detector and Charge Pump Architecture to Achieve Fast Locking of Phase-Locked Loop
|
| 382 |
96-2
|
會議論文
|
A Spread-Spectrum Clock Generator Using Fractional-N PLL Controlled Delta-Sigma Modulator for Serial-ATA III
|
| 383 |
98-1
|
會議論文
|
A Low Power Multi-Voltage Control Technique with Fast-Settling Mechanism for Low Dropout Regulator
|
| 384 |
95-2
|
會議論文
|
A 30Phase 500MHz PLL for 3X Over-Sampling Clock Data Recovery
|
| 385 |
95-1
|
會議論文
|
Analysis and Design of High Performance, Low Power Multiple Ports
|
| 386 |
95-1
|
會議論文
|
A New Dynamic Floating Input D Flip-Flop (DFIDFF) for High Speed and Ultra Low Voltage Divided-by 4/5 Prescaler
|
| 387 |
98-1
|
會議論文
|
Designing Ultra-Low Voltage PLL Using a Bulk-Driven Technique
|
| 388 |
98-1
|
會議論文
|
A Pseudo Fractional-N and Multiplier Clock Generator with 50% Duty Cycle Output Using Low Power Phase Combination Controller
|
| 389 |
94-2
|
會議論文
|
The new improved pseudo fractional-N clock generator with 50% duty cycle
|
| 390 |
95-2
|
會議論文
|
New Power Gating Structure with Low Voltage Fluctuations by Bulk Controller in Transition Mode
|
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