The High-Performance and Low-Power CMOS Output Driver Design
學年 99
學期 1
出版（發表）日期 2011-01-01
作品名稱 The High-Performance and Low-Power CMOS Output Driver Design
作品名稱（其他語言）
著者 Cheng, Ching-tsan; Wang, Chi-hsiung; Liao, Pei-hsuan; Yang, Wei-bin; Lo, Yu-lung
單位 淡江大學電機工程學系
出版者 Dordrecht: Springer Netherlands
著錄名稱、卷期、頁數 Lecture Notes in Electrical Engineering 98, pp.917-925
摘要 There are many important points for high-speed CMOS integrated circuit, such as switching speed, power dissipation and full-swing of voltage. In this paper, a group of high performance and low-power bootstrapped CMOS drivers are designed in order to reduce power consumption and enhance the speed of switch for driving a large load, where the drivers will reduce the power consumption by using bootstrap manipulate conditional to input statistics. Moreover, the low swing bootstrapped feedback controlled split path (LBFS) is conducted to reduce the dynamic power dissipation and limiting the voltage swing of gate of the output stage. Finally, the charge transfer feedback controlled split path (CRFS) CMOS buffer is used to restitute and pull down the gate voltage for reducing power consumption and line noise. According to the HSPICE simulation results, the proposed drivers of the CMOS driver are reduced by 20%~40 compared to the conventional design.
關鍵字 CMOS buffer;Bootstrapped driver;low-power driver;feedback-controlled
語言 en_US
ISSN 1876-1100; 1876-1119
期刊性質 國外
收錄於 EI
產學合作
通訊作者 Cheng, Ching-tsan; Wang, Chi-hsiung; Liao, Pei-hsuan; Yang, Wei-bin; Lo, Yu-lung
審稿制度
國別 NLD
公開徵稿
出版型式 紙本
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