A Process and Temperature Insensitive Two-Step VCO-Based ADC in 90nm CMOS
學年 114
學期 1
發表日期 2025-11-04
作品名稱 A Process and Temperature Insensitive Two-Step VCO-Based ADC in 90nm CMOS
作品名稱（其他語言）
著者 Sheng-Shiang Lai; Hsin-Liang Chen; Jen-Shiun Chiang
作品所屬單位
出版者
會議名稱 International Symposium on Intelligent Signal Processing and Communication Systems
會議地點 Bandung, Indonesia
摘要 A 10 MHz-bandwidth 10-bit two-step VCO-based delta-sigma ADC with process and temperature calibration is presented. The proposed ADC achieves robust performance and wide bandwidth by leveraging an open-loop structure and highly digital building blocks. The nonlinearities of the coarse and fine VCO-based quantizers are alleviated by distortion cancellation and voltage swing reduction techniques, respectively. A process and temperature calibration scheme is employed to mitigate the resolution degradation caused by KVCO frequency variation under process and temperature variations, aligning the KVCO closely with the desired gain. Benefiting from the intrinsic dynamic element matching the VCO-based quantizer output, the matching requirement of the DAC cells is greatly relaxed. Simulation results in a 90 nm CMOS process demonstrate that the ADC achieves 53.1 dB SNDR and 57.1 dB SFDR over 10 MHz bandwidth at 1 GS/s sampling rate.
關鍵字 analog-to-digital converter; process and temperature insensitive; time-domain; VCO-based.
語言 en
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會議性質 國際
校內研討會地點 無
研討會時間 20251104~20251107
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國別 IDN
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機構典藏連結 ( http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/128052 )