| A 89.7dB SNDR Second-Order Noise-Shaping SAR ADC with Passive-Active Hybrid Loop Filter | |
|---|---|
| 學年 | 114 |
| 學期 | 1 |
| 發表日期 | 2025-10-15 |
| 作品名稱 | A 89.7dB SNDR Second-Order Noise-Shaping SAR ADC with Passive-Active Hybrid Loop Filter |
| 作品名稱（其他語言） | |
| 著者 | Yun-Chieh Chang; Chuang-Hsuan Chueh; Hsin-Liang Chen; and Jen-Shiun Chiang |
| 作品所屬單位 | |
| 出版者 | |
| 會議名稱 | The 22nd International SoC Conference |
| 會議地點 | Busan, Korea |
| 摘要 | This paper uses the passive-active hybrid loop filter to present a second-order noise-shaping successive approximation register analog-to-digital converter. The loop filter comprises a closed-loop floating inverter amplifier, capacitive charge pump and switch-capacitor circuits to achieve second-order oiseshaping. This work achieves SNDR of 89.7dB over a 250kHz bandwidth with an oversampling ratio of 16. It consumes 290.4μW of power under a 1.8 V analog supply and a 1.2 V digital supply. The prototype is implemented in 180-nm CMOS technology and occupies an active area of 0.045mm2. The Schreier FoM reaches 179dB. |
| 關鍵字 | successive approximation register (SAR) ADC; noise-shaping; Analog-to-Digital Converter (ADC); floating inverter amplifier (FIA) |
| 語言 | en |
| 收錄於 | |
| 會議性質 | 國際 |
| 校內研討會地點 | 無 |
| 研討會時間 | 20251015~20251017 |
| 通訊作者 | |
| 國別 | KOR |
| 公開徵稿 | |
| 出版型式 | |
| 出處 | |
| 相關連結 |
機構典藏連結 ( http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/128050 ) |
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