教師資料查詢 | 類別: 會議論文 | 教師: 鄭國興 CHENG KUO-HSING (瀏覽個人網頁)

標題:Design of Low-Power Content Addressable Memory Cell
學年
學期
發表日期2003/08/12
作品名稱Design of Low-Power Content Addressable Memory Cell
作品名稱(其他語言)
著者Cheng, Kuo-Hsing; Wei, Chia-Hung; Wu, Chen-Lung
作品所屬單位淡江大學電機工程學系
出版者
會議名稱第十四屆超大型積體電路暨計算機輔助設計技術研討會=The 14th VLSI Design/CAD Symposium
會議地點花蓮縣, 臺灣
摘要Content Addressable Memory (CAM), a large amount of energy is generally expended charging and discharging most of the match lines on most cycles. In this paper, a new low-power CAM cell design is proposed to reduce the comparison power of CAM cell. Moreover, in the CAM word circuit design, a staticpseudo nMOS logic structure with a precomputation approach is used to effectively avoid the frequently switching in the match lines. The HSPICE simulation results are based on TSMC 0.25 m μ CMOS process with2.5 V supply voltage. The power consumption of the proposed CAM is 16.38 mW under 300 MHz operation frequency. Moreover, the power-performance metric is13.33 fJ/bit/search for random inputs.
關鍵字低功率;可定址記憶體記憶單元;滿足定址記憶體;隨機存取記憶體;非同步傳輸模式;Low power;Addressable memory cell;Content adddressable memory (CAM);Random-access memory (RAM);Asynchronous transfer mode (ATM)
語言英文
收錄於
會議性質國內
校內研討會地點
研討會時間20030812~20030815
通訊作者
國別中華民國
公開徵稿Y
出版型式紙本
出處第十四屆超大型積體電路設計暨計算機輔設計技術研討會論文摘要集=Proceedings of The 14th VLSI Design/CAD Symposium頁245-248
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