教師資料查詢 | 類別: 期刊論文 | 教師: 張志勇 Chih-yung Chang (瀏覽個人網頁)

標題:Improving memory traffic by assembly-level exploitation of reuses for vector registers
學年
學期
出版(發表)日期2000/09/01
作品名稱Improving memory traffic by assembly-level exploitation of reuses for vector registers
作品名稱(其他語言)
著者Chang, Chih-yung; Chen, T. S.; Sheu, J. P.
單位淡江大學資訊工程學系
出版者
著錄名稱、卷期、頁數The journal of supercomputing 17(2), pp.187-204
摘要In this paper, we propose a compilation scheme to analyze and exploit the implicit reuses of vector register data. According to the reuse analysis, we present a translation strategy that translates the vectorized loops into assembly vector codes with exploitation of vector reuses. Experimental results show that our compilation technique can improve the execution time and traffic between shared memory and vector registers. Techniques discussed here are simple, systematic, and easy to be implemented in the conventional vector compilers or translators to enhance the data locality of vector registers.
關鍵字data dependence;vector register;partial reuse;vector compilers;reuse distance;vectorization;supercomputer
語言英文
ISSN
期刊性質國外
收錄於SCI;
產學合作
通訊作者
審稿制度
國別中華民國
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