The suggestion for CFS CMOS buffer | |
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學年 | 88 |
學期 | 1 |
發表日期 | 1999-09-05 |
作品名稱 | The suggestion for CFS CMOS buffer |
作品名稱(其他語言) | |
著者 | Cheng, Kuo-hsing; Yang, Wei-bin |
作品所屬單位 | 淡江大學電機工程學系 |
出版者 | N.Y.: Institute of Electrical and Electronic Engineers (IEEE) |
會議名稱 | Electronics, Circuits and Systems, 1999. Proceedings of ICECS '99. The 6th IEEE International Conference on |
會議地點 | Pafos, Cyprus |
摘要 | Two recent papers, one by Huang et al. (1996) and the other by Cheng et al. (1997), on the driver buffer are commented on. The feedback-controlled split-path CMOS buffer (FS) claims that the 4-split-path buffer can reduce the power and power-delay product. But the voltage of the gates in the output inverter stage is not enough to turn-off the PMOS transistor and the NMOS transistor. Due to this, charge-recovery must be used. The charge-transfer feedback-controlled split-path (CFS) CMOS buffer that has high-speed low-power performance by using transfer of the charge stored in the split output-stage driver to the output node. Thus the power-delay product can be reduced greatly by combining the technology described in the former two papers. The HSPICE simulation results show that the power-delay product of the suggested CMOS buffer is reduced by 20% to 40% in comparison to the conventional CMOS tapered buffer at 100 MHz operation frequency at heavy capacitive load |
關鍵字 | |
語言 | en |
收錄於 | |
會議性質 | 國際 |
校內研討會地點 | |
研討會時間 | 19990905~19990908 |
通訊作者 | |
國別 | CYP |
公開徵稿 | |
出版型式 | 紙本 |
出處 | Electronics, Circuits and Systems, 1999. Proceedings of ICECS '99. The 6th IEEE International Conference on (Volume:2 ), pp.799-802 |
相關連結 |
機構典藏連結 ( http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/38857 ) |