教師資料查詢 | 類別: 會議論文 | 教師: 翁慶昌 Wong Ching-chang (瀏覽個人網頁)

標題:Hardware/Software Co-design for Particle Swarm Optimization Algorithm
學年99
學期1
發表日期2010/10/10
作品名稱Hardware/Software Co-design for Particle Swarm Optimization Algorithm
作品名稱(其他語言)
著者Li, Shih-an; Wong, Ching-chang; Yu, Chia-jun; Hsu, Chen-chien
作品所屬單位淡江大學電機工程學系
出版者Institute of electrical and electronics engineers (IEEE)
會議名稱Systems Man and Cybernetics (SMC), 2010 IEEE International Conference on
會議地點Istanbul, Turkey
摘要This paper presents a hardware/software (HW/SW) co-design approach using SOPC technique and pipeline design method to improve the performance of particle swarm optimization (PSO) for embedded applications. Based on modular design architecture, a particle updating accelerator module via hardware implementation for updating velocity and position of particles and a fitness evaluation module implemented on a soft-cored processor for evaluating the objective functions are respectively designed and work closely together to accelerate the evolution process. Thanks to a flexible design, the proposed approach can tackle various optimization problems of embedded applications without the need for hardware redesign. To compensate the deficiency in generating truly random numbers by hardware implementation, a particle re-initialization scheme is also presented in this paper to further improve the execution performance of the PSO. Experiment results have demonstrated that the proposed HW/SW co-design approach to realize PSO is capable of achieving a high-quality solution effectively.
關鍵字Field Programmable Gate Array (FPGA);HW/SW Co-design;Particle swarm optimization (PSO);system on a programmable chip (SOPC)
語言英文
收錄於
會議性質國際
校內研討會地點
研討會時間20101010~20101013
通訊作者
國別土耳其
公開徵稿Y
出版型式
出處Proceedings of the IEEE International Conference on Systems, Man and Cybernetics, pp.3762-3767
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