113 / 1 |
Discrete-Time Delta-Sigma Modulator with Successively Approximating Register ADC Assisted Analog Feedback Technique
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#04.優質教育
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2025-04-23 |
110 / 2 |
A Novel Buck Converter with Dual Loops Control Mechanism
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#04.優質教育
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2024-09-13 |
110 / 1 |
A Novel Buck Converter with Constant Frequency Controlled Technique
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#04.優質教育
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2024-09-13 |
110 / 1 |
Adaptive On-Time Control Buck Converter with a Novel Virtual Inductor Current Circuit
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#04.優質教育
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2024-09-13 |
109 / 1 |
Reconfigurable Double-Sampled Cascaded Sigma-Delta Modulator with Power Minimizing and System Stabilizing Strategy for Multi-Mode Applications
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#04.優質教育
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2024-09-13 |
113 / 1 |
Buck Converter Scheme with High Transient Response
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2025-04-23 |
113 / 2 |
A 6th Order Current- Mirror-Based Gm-C Bandpass Filter with the Binary Searching Calibration Scheme for Capacitor Sensing Applications
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2025-04-23 |
102 / 2 |
Correction to A Low-Offset Low-Noise Sigma-Delta Modulator with Pseudorandom Chopper-Stabilization Technique
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2025-04-24 |
100 / 2 |
A Low Power Sigma-Delta Modulator for Dual-Mode Wide-Band Receiver
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2025-04-24 |
100 / 2 |
Heuristic FIR Filter Design for Cascaded Sigma Delta Modulators with Finite Amplifier Gain
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2025-04-24 |
098 / 1 |
A Low-Offset Low-Noise Sigma-Delta Modulator with Pseudorandom Chopper-Stabilization Technique
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2025-04-24 |
098 / 1 |
Inductorless CMOS Receiver Front-End Circuits for 10-Gb/s Optical Communications
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2025-04-24 |
094 / 2 |
Opamp Gain Insensitive MASH Sigma Delta Modulator for Wide Bandwidth Applications
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2025-04-24 |