A Partial Page Cache Strategy for NVRAM-Based Storage Devices
學年 108
學期 2
出版（發表）日期 2020-02-01
作品名稱 A Partial Page Cache Strategy for NVRAM-Based Storage Devices
作品名稱（其他語言）
著者 Shuo-Han Chen; Tseng-Yi Chen; Yuan-Hao Chang; Hsin-Wen Wei; Wei-Kuan Shih
單位
出版者
著錄名稱、卷期、頁數 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 39(2), p.373-386
摘要 Nonvolatile random access memory (NVRAM) is becoming a popular alternative as the memory and storage medium in battery-powered embedded systems because of its fast read/write performance, byte-addressability, and nonvolatility. A well-known example is phase-change memory (PCM) that has much longer life expectancy and faster access performance than NAND flash. When NVRAM is considered as both main memory and storage in battery-powered embedded systems, existing page cache mechanisms have too many unnecessary data movements between main memory and storage. To tackle this issue, we propose the concept of “union page cache,” to jointly manage data of the page cache in both main memory and storage. To realize this concept, we design a partial page cache strategy that considers both main memory and storage as its management space. This strategy can eliminate unnecessary data movements between main memory and storage without sacrificing the data integrity of file systems. A series of experiments was conducted on an embedded platform. The results show that the proposed strategy can improve the file accessing performance up to 85.62% when PCM used as a case study.
關鍵字 Random access memory;Nonvolatile memory;Memory management;Performance evaluation;Embedded systems;Phase change materials
語言 en_US
ISSN 1937-4151
期刊性質 國外
收錄於 SCI EI
產學合作
通訊作者
審稿制度 是
國別 USA
公開徵稿
出版型式 ,電子版
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機構典藏連結 ( http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/118162 )

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