Enabling union page cache to boost file access performance of NVRAM-based storage device | |
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學年 | 106 |
學期 | 2 |
發表日期 | 2018-06-24 |
作品名稱 | Enabling union page cache to boost file access performance of NVRAM-based storage device |
作品名稱(其他語言) | |
著者 | Shuo-Han Chen; Tseng-Yi Chen; Yuan-Hao Chang; Hsin-Wen Wei; Wei-Kuan Shih |
作品所屬單位 | |
出版者 | |
會議名稱 | Design Automation Conference |
會議地點 | San Francisco, CA |
摘要 | Due to the fast access performance, byte-addressability, and non-volatility of non-volatile random access memory (NVRAM), NVRAM has emerged as a popular candidate for the design of memory/storage systems on mobile computing systems. For example, the latest 3D xPoint memory could be a kind of NVRAM with much longer life expectancy than NAND ash and could ease the possible endurance issue. When NVRAM is considered as both main memory and storage in mobile computing systems, existing page cache mechanisms introduce too many unnecessary data movements between main memory and storage. To resolve this issue, we propose the concept of “union page cache,” which jointly manages data of the page cache in both main memory and storage. To realize this concept, a partial page cache strategy is designed to consider both main memory and storage as its management space and to eliminate unnecessary data movements between main memory and storage without sacricing the data consistency of le systems. Experimental results show that the proposed strategy can boost the le accessing performance upto 85.62% when using PCM as a case study. |
關鍵字 | NVRAM; page cache; mobile computing systems; FAT |
語言 | en_US |
收錄於 | |
會議性質 | 國際 |
校內研討會地點 | 無 |
研討會時間 | 20180624~20180628 |
通訊作者 | |
國別 | USA |
公開徵稿 | |
出版型式 | |
出處 | In the proceedings of DAC 172:1-172:6 |
相關連結 |
機構典藏連結 ( http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/114978 ) |