A novel asynchronous control unit and the application to a pipelined multiplier
學年 86
學期 2
發表日期 1998-05-31
作品名稱 A novel asynchronous control unit and the application to a pipelined multiplier
作品名稱（其他語言）
著者 江正雄; Chiang, Jen-shiun; Liao, Jun-yao
作品所屬單位 淡江大學電機工程學系
出版者 Institute of Electrical and Electronics Engineers (IEEE)
會議名稱 Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on
會議地點
摘要 This paper discusses the technique for asynchronous circuit design using a novel asynchronous control unit. We employ the very commonly used device, pass-transistor multiplexer, to design and implement the asynchronous control unit. Even though the architecture of the control unit is simple, the efficiency is good. A multiplier with pipelined structure has been designed to verify the usefulness of this technique. We use TSMC's 0.6 μm SPDM process to design and implement an 8-b×8-b pipelined multiplier. The HSPICE simulation shows that the feedthrough rate of the inputs can be as high as 250 MHz.
關鍵字
語言 en
收錄於
會議性質 國際
校內研討會地點
研討會時間 19980531~19980603
通訊作者
國別 USA Monterey, CA, USA
公開徵稿
出版型式 紙本
出處 Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on (Volume:2 ), pp.169-172
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