教師資料查詢 | 類別: 期刊論文 | 教師: 李揚漢LEE YANG-HAN (瀏覽個人網頁)

標題:Low-power/High-speed scalable and subchannelizable FFT architecture for SOFDMA application
學年97
學期1
出版(發表)日期2008/09/01
作品名稱Low-power/High-speed scalable and subchannelizable FFT architecture for SOFDMA application
作品名稱(其他語言)
著者李揚漢; Lee, Yang-han; Chiang, Jen-shiun; Chou, Yen-hsih; Lee, Yu-shih; Tseng, Hsien-wei; Chuang, Ming-hsueh
單位淡江大學電機工程學系
出版者淡江大學
著錄名稱、卷期、頁數淡江理工學刊 = Tamkang Journal of Science and Engineering 11(3), pp.313-324
摘要In this paper, a scalable and subchannelizable innovative FFT architecture is proposed to provide with low-power and high-speed characteristics for SOFDMA application in IEEE 802.16 WiMAX communication and other fields that have features in SOFDMAapplications. The scalability design uses multiplexing concept to build only one 1024-point and only one 2048-point FFT processors in an IEEE 802.16e and an IEEE 802.16-2004 WiMAX system respectively. The spirits of
the subchannelization design are prohibited all of the unused arithmetic operations in the present inventive design to achieve low-power requirement when only a small subset of FFT outputs are of interests for a specific Subscriber Station in one session of a IEEE 802.16e or IEEE 802.16-2004 WiMAX systems. The SELDIF registry control methodology of the key control mechanism of the subchannelization design is also disclosed for the purposes of structure simplification and low-power/high-speed design in this paper. The performance on areas and power efficiency are analyzed based on MATLAB codes. A closed system platform is used to tune design parameters for chip implementation by using Agilent ADS tool.
關鍵字
語言英文
ISSN1560-6686
期刊性質國內
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產學合作
通訊作者
審稿制度
國別中華民國
公開徵稿
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