A 1-V 10.7-MHz fourth-order bandpass ΔΣ modulators using two switched op amps | |
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學年 | 93 |
學期 | 1 |
出版(發表)日期 | 2004-11-01 |
作品名稱 | A 1-V 10.7-MHz fourth-order bandpass ΔΣ modulators using two switched op amps |
作品名稱(其他語言) | |
著者 | 郭建宏; Kuo, Chien-hung; Liu, Shen-iuan |
單位 | 淡江大學電機工程學系 |
出版者 | Piscataway: Institute of Electrical and Electronics Engineers (IEEE) |
著錄名稱、卷期、頁數 | IEEE Journal of Solid-State Circuits 39(11), pp.2041-2045 |
摘要 | A 1-V 10.7-MHz fourth-order bandpass delta-sigma modulator using two switched opamps (SOPs) is presented. The 3/4 sampling frequency and the double-sampling techniques are adapted for this modulator to relax the required clocking rate. The presented modulator can not only reduce the number of SOPs, but also the number of capacitors. It has been implemented in 0.25-μm 1P5M CMOS process with MIM capacitors. The modulator can receive 10.7-MHz IF signals by using a clock frequency of 7.13 MHz. A dynamic range of 62 dB within bandwidth of 200 kHz is achieved and the power consumption of 8.45 mW is measured at 1-V supply voltage. The image tone can be suppressed by 44 dB with respect to the carrier. The in-band third-order intermodulation (IM3) distortion is -65 dBc below the desired signal. |
關鍵字 | |
語言 | en |
ISSN | 0018-9200 |
期刊性質 | 國外 |
收錄於 | EI SCI |
產學合作 | |
通訊作者 | |
審稿制度 | |
國別 | USA |
公開徵稿 | |
出版型式 | |
相關連結 |
機構典藏連結 ( http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/46197 ) |