A multiple frequency clock generator using wide operation frequency range phase interpolator
學年 102
學期 1
出版(發表)日期 2013-08-01
作品名稱 A multiple frequency clock generator using wide operation frequency range phase interpolator
作品名稱(其他語言)
著者 Yang, Wei-Bin; Wang, Chi-Hsiung; Yeh, Sheng-Shih; Liao, Chao-Cheng
單位 淡江大學電機工程學系
出版者 London: Elsevier Ltd
著錄名稱、卷期、頁數 Microelectronics Journal 44(8), pp.688-695
摘要 This paper presents a multiple frequency clock generator that is composed of the wide operation frequency range phase interpolator and the phase combiner. The wide operation frequency range phase interpolator is developed using a delay-time-adjustment phase interpolator (DTAPI) circuit with various oscillation frequencies for different clock domain applications. The phase combiner generates multiple clock frequencies through various phase combination inputs generated by the preceding proposed phase interpolators. The varying output transition delay time of the proposed DTAPI is the result of the various oscillation frequencies of the voltage-controlled oscillator. The test chip was fabricated in a 0.18 μm CMOS process with a 1.8 V supply voltage. The measured phase noise and power dissipation are −87.28 dBc/Hz at 1 MHz offset frequency from 88.8 MHz and 1.32 mW, −77.47 dBc/Hz and 2.06 mW from 797.8 MHz, respectively. The duty cycle error rate of the output clock frequency is less than 1.5%.
關鍵字 Delay-time-adjustment;Duty cycle;Multiple frequency;Phase interpolator;Voltage-controlled oscillator
語言 en_US
ISSN 0959-8324
期刊性質 國外
收錄於 SCI
產學合作
通訊作者
審稿制度
國別 GBR
公開徵稿
出版型式 ,紙本
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