| Design and Implementation of Subchannelization Scheduler in IEEE 802.16 Broadband Wireless Access Systems | |
|---|---|
| 學年 | 97 |
| 學期 | 1 |
| 出版（發表）日期 | 2008-09-01 |
| 作品名稱 | Design and Implementation of Subchannelization Scheduler in IEEE 802.16 Broadband Wireless Access Systems |
| 作品名稱（其他語言） | |
| 著者 | Tseng, Hsien-wei; Chou, Yen-hsih; Chuang, Ming-hsueh; 李揚漢; Lee, Yang-han; Sheu, Shiann-tsong; 詹益光; Jan, Yih-guang |
| 單位 | 淡江大學電機工程學系 |
| 出版者 | Taipei : Chinese Institute of Chemical Engineers |
| 著錄名稱、卷期、頁數 | Journal of the Chinese Institute of Engineers=中國工程學刊 31(6), pp.967-976 |
| 摘要 | In this paper we propose a method of using a heuristic Genetic Algorithm (GA) to solve the Fast Fourier Transform subchannelization scheduling (FFTSS) problem in IEEE 802.16 broadband wireless access systems. In such a multi-user transmission system with quality of service (QoS) requirements, data from different users should be quickly scheduled and transmitted within the shortest transmission time period. In this paper, we propose a GA-based scheduler that will search the best configurations of the uplink and/or downlink sub-frames in order to obtain the optimal system throughput as well as quality of services. Due to the slow convergence of conventional GAs, we design a novel hardware architecture to accelerate the processing speed of GA which is used for scheduling the Down Link (DL) sub-frames. We then describe the procedure of using Field-Programmable Gate-Array (FPGA) to implement the designed hardware to verify the convergence of the algorithm. With this hardware implementation, the proposed method indeed helps us to construct a fast optimization tool to be applied in broadband wireless communication systems. |
| 關鍵字 | IEEE 802.16;subchannelization;scheduling;Genetic Algorithm (GA) |
| 語言 | en |
| ISSN | 0253-3839 |
| 期刊性質 | 國內 |
| 收錄於 | |
| 產學合作 | |
| 通訊作者 | |
| 審稿制度 | |
| 國別 | TWN |
| 公開徵稿 | |
| 出版型式 | 紙本 |
| 相關連結 |
機構典藏連結 ( http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/50575 ) |
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