教師資料查詢 | 類別: 期刊論文 | 教師: 江正雄 CHIANG JEN-SHIUN (瀏覽個人網頁)

標題:Design of an Adjustable-way Cache for Energy Reduction
學年
學期
出版(發表)日期2005/07/01
作品名稱Design of an Adjustable-way Cache for Energy Reduction
作品名稱(其他語言)
著者Chen, Hsin-chuan; Chiang, Jen-shiun
單位淡江大學電機工程學系
出版者Taipei : Chinese Institute of Chemical Engineers
著錄名稱、卷期、頁數Journal of the Chinese Institute of Engineers=中國工程學刊 28(4), pp. 691- 700
摘要Conventional set‐associative caches, with higher associativity, provide lower miss rates. However, they suffer from longer hit access time and larger energy dissipation. Based on the consideration of different program localities, programs should have their own appropriate associativity of caches. In this paper, we propose a set‐associative cache that can provide flexibilities to adjust its associativity according to different program behaviors, which means that the proposed cache scheme can be adjusted from an n‐way set‐associative cache to a direct‐mapped cache. By use of this cache architecture, power consumption can be lowered when an n‐way set‐associative cache configures the cache with lower associativity (less than n) due to only enabling fewer subarrays of the tag memory and data memory. However, the performance is still maintained at the same level as in a conventional set‐associative cache or direct‐mapped cache. Adjustable‐way set‐associative caches can also be applied to multiprocessor systems to reduce the average, overall system, energy dissipation.
關鍵字Associativity;Adjustable-way;Average energy dissipation;Multiprocessor systems
語言英文
ISSN0253-3839
期刊性質國內
收錄於
產學合作
通訊作者
審稿制度
國別中華民國
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