Implemented LDO Chip with Output Capacitors Free
學年 101
學期 1
出版（發表）日期 2013-01-01
作品名稱 Implemented LDO Chip with Output Capacitors Free
作品名稱（其他語言）
著者 Jan, Yih-Guang; Tseng, Hsien-Wei; Lee, Yang-Han; Huang, Chao-Chung; Yen, Liang-Yu
單位 淡江大學電機工程學系
出版者 Stafa-Zurich: Trans Tech Publications Ltd.
著錄名稱、卷期、頁數 Applied Mechanics and Materials 284-287, pp.2521-2525
摘要 In this paper the process of implementing a low dropout regulator (LDO) chip is presented; it is using uses Taiwan Semiconductor TSMC’s Manufacture Inc. 0.35um 2P4M process. The circuit designed with the described process can be is operated at 3-5V input voltage to generate 2.5V output voltage. Maximum output current can be running up to 200mA. This LDO is implemented without placing output capacitors to reduce BOM (Bill of Material) cost and stable between 0~200mA loading current and the chip is stable when the loading current is in the range 0~200mA. [8] The new proposed LDO chip can be implemented in the handheld mobile devices, battery powered equipment,wireless devices, cordless phones, or PC peripherals.
關鍵字
語言 en_US
ISSN 1660-9336
期刊性質 國外
收錄於 EI
產學合作
通訊作者 Tseng, Hsien-Wei
審稿制度 是
國別 CHE
公開徵稿
出版型式 紙本
相關連結

機構典藏連結 ( http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/81317 )

機構典藏連結