2.5-GHz hybrid oscillator with both a wide tuning range and high frequency resolution for digital PLL
學年 99
學期 2
發表日期 2011-04-15
作品名稱 2.5-GHz hybrid oscillator with both a wide tuning range and high frequency resolution for digital PLL
作品名稱（其他語言）
著者 施鴻源; Chiu, Huan-ke; Chueh, Tzu-chan; Chen, Chiou-bang
作品所屬單位 淡江大學電機工程學系
出版者 IEEE
會議名稱
會議地點
摘要 A hybrid oscillator for WiMAX application is presented with comprehensive study. The hybrid oscillator is part of a digital fractional-N frequency synthesizer realized in a 0.13-um CMOS process. By operating the DAC followed by oscillator, the requirement of finest switched capacitor value and high-speed dithering of ǻӢ data converter are relaxed. A time-domain simulation approach for modeling the phase noise introduced by the frequency discretization was taken. The proposed approach is well suited to investigate complex interactions in the sophisticated system, which cannot be studied by using conventional RF and analog simulation tools. The prototype core chip consumes 8.6 mA from a 1.4-V supply while providing a phase noise of -120.35 dBc/Hz at 1 MHz offset from 2.808 GHz carrier and a 570 MHz frequency tuning range (23%).
關鍵字 ADPLL Oscillator; frequency synthesizer; varactor; phase noise; tuning range
語言 en_US
收錄於
會議性質 國際
校內研討會地點
研討會時間 20110415~20110417
通訊作者
國別
公開徵稿
出版型式
出處 2011 International Conference on Electric Information and Control Engineering (ICEICE), Wuhan, China, pp952-955
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