Table-lookup approach for compiling two-level data-processor mappings in HPF
學年 86
學期 1
發表日期 1997-08-01
作品名稱 Table-lookup approach for compiling two-level data-processor mappings in HPF
作品名稱（其他語言）
著者 石貴平; Shih, Kuei-ping; Sheu, Jang-ping; Huang, Chua-huang
作品所屬單位 淡江大學資訊工程學系
出版者
會議名稱 International Workshop on Languages and Compilers for Parallel Computing (LCPC)
會議地點 Minnesota, USA
摘要 This paper presents some compilation techniques to compress holes. Holes are the memory locations mapped by useless template cells and are caused by the non-unit alignment stride in a two-level dataprocessor mapping. In a two-level data-processor mapping, there is a repeated pattern for array elements mapped onto processors. We classify blocks into classes and use a class table to record the attributes of classes for the data distribution. Similarly, data distribution on a processor also has a repeated pattern. We use compression table to record the attributes of the first data distribution pattern on that processor. By using class table and compression table, hole compression can be easily and efficiently achieved. Compressing holes can save memory usage, improve spatial locality and further increase system performance. The proposed method is efficient, stable and easy implement. The experimental results do confirm the advantages of our proposed method over existing methods.
關鍵字 Active Element;Array Element;Array Statement;Virtual Processor;Local Array
語言 en
收錄於
會議性質 國際
校內研討會地點 無
研討會時間 19970801~19970801
通訊作者
國別 USA
公開徵稿
出版型式
出處 International Workshop on Languages and Compilers for Parallel Computing (LCPC), Minnesota, USA
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