Low power sigma delta modulator with dynamic biasing for audio applications | |
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學年 | 96 |
學期 | 1 |
發表日期 | 2007-08-05 |
作品名稱 | Low power sigma delta modulator with dynamic biasing for audio applications |
作品名稱(其他語言) | |
著者 | Chen, Hsin-liang; Lee, Yi-sheng; Chiang, Jen-shiun |
作品所屬單位 | 淡江大學電機工程學系 |
出版者 | IEEE |
會議名稱 | Circuits and Systems, 2007. MWSCAS 2007. 50th Midwest Symposium on |
會議地點 | Montreal, Quebec, Canada |
摘要 | In this paper, a low power sigma delta modulator with dynamic biasing technique is presented. According to the analysis of the operations of the switched-capacitor integrator, the folded-cascode operational amplifier can be designed with optimized biasing currents in three different phases to reduce power dissipations. The total power saving is 20% of the general one. A prototyping fourth order single-bit MASH 2-2 sigma delta modulator is designed with the technique of dynamic biasing to achieve dynamic range of 95 dB and peak signal-to-noise-and-distortion-ratio of 93 dB. The experimental circuit is designed in 0.35 mum 2P4M CMOS technology. The chip area is 3.11 mm2, and the power dissipation is only 5 mW from a supply voltage of 3 V. |
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語言 | |
收錄於 | |
會議性質 | 國際 |
校內研討會地點 | |
研討會時間 | 20070805~20070808 |
通訊作者 | |
國別 | CAN |
公開徵稿 | Y |
出版型式 | |
出處 | Circuits and Systems, 2007. MWSCAS 2007. 50th Midwest Symposium on, pp.159-162 |
相關連結 |
機構典藏連結 ( http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/70473 ) |
SDGS | 永續城市與社區,負責任的消費與生產,夥伴關係,優質教育,尊嚴就業與經濟發展,產業創新與基礎設施 |