| The Grid-Based Two-Layer Routing Algorithm Suitable for Cell/IP-Based Circuit Design | |
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| 學年 | 97 | 
| 學期 | 1 | 
| 發表日期 | 2008-08-31 | 
| 作品名稱 | The Grid-Based Two-Layer Routing Algorithm Suitable for Cell/IP-Based Circuit Design | 
| 作品名稱(其他語言) | |
| 著者 | Liu, Chia-Jung; Lin, Yi-Chen; Rau, Jiann-Chyi | 
| 作品所屬單位 | 淡江大學電機工程學系 | 
| 出版者 | Department of Micro and Nanoelectronics Faculty of ICT University of Malta | 
| 會議名稱 | Proc. of IEEE International Conference on Electronics Circuits and Systems (ICECS) | 
| 會議地點 | St. Julien's, Malta | 
| 摘要 | In this work, we employ gridded model for channel routing and place the terminals which are horizontally aligned. We have developed a two-layer channel router that can eliminate the constraints due to overlap. The proposed approach is suitable for cell/IP-based channel-less circuit with a few channels. Our developed tool can route the nets in nearly linear time achieving to the advantage of time to market, and lead to the area overhead of 6.34% increase in average. The area overhead results from the space insertion, and we also have shown that the proposed algorithm can achieve 100% routing on most ISCASpsila85 benchmarks. In addition, the number of channel tracks can be minimized by our algorithm. | 
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| 會議性質 | 國際 | 
| 校內研討會地點 | |
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| 國別 | MLT | 
| 公開徵稿 | |
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| 出處 | Proc. of IEEE International Conference on Electronics Circuits and Systems (ICECS), Malta, pp.462-465 | 
| 相關連結 | 機構典藏連結 ( http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/70578 ) | 
| SDGS | 產業創新與基礎設施 |