教師資料查詢 | 類別: 會議論文 | 教師: 江正雄CHIANG JEN-SHIUN (瀏覽個人網頁)

標題：An efficient VLSI architecture for RSA public-key cryptosystem
學年87
學期2
發表日期1999/05/30
作品名稱An efficient VLSI architecture for RSA public-key cryptosystem
作品名稱（其他語言）具高效能RSA公開金匙編碼系統之超大型積體電路架構
著者江正雄; Chiang, Jen-shiun; Chen, Jian-kao
作品所屬單位淡江大學電機工程學系
出版者Institute of Electrical and Electronics Engineers (IEEE)
會議名稱Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on
會議地點Orlando, FL, USA
摘要In this paper, a new efficient VLSI architecture to compute RSA public-key cryptosystem is proposed. The modified H-algorithm is applied to find the modular exponentiation. By this modified H-algorithm, the modular multiplication steps were reduced by about 5n/18. For the modular multiplication the L-algorithm (LSB first) is used. In the architecture of the modular multiplication the iteration times are only half of Montgomery's algorithm and the H-algorithm. By this arrangement, this architecture of RSA has a very good area-time product.
關鍵字
語言英文
收錄於
會議性質國際
校內研討會地點
研討會時間19990530~19990602
通訊作者
國別美國
公開徵稿
出版型式紙本
出處Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on (Volume:1 ), pp.496-499
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