教師資料查詢 | 類別: 期刊論文 | 教師: 施鴻源SHIH, HORNG-YUAN (瀏覽個人網頁)

標題:An 80x Analog-Implemented Time-Difference Amplifier for Delay-Line-Based Coarse-Fine Time-to-Digital Converters in 0.18-μm CMOS
學年104
學期1
出版(發表)日期2015/08/13
作品名稱An 80x Analog-Implemented Time-Difference Amplifier for Delay-Line-Based Coarse-Fine Time-to-Digital Converters in 0.18-μm CMOS
作品名稱(其他語言)
著者Horng-Yuan Shih; Sheng-Kai Lin; Po-Shun Liao
單位
出版者
著錄名稱、卷期、頁數IEEE Transactions on Very Large Scale Integration Systems 23(8), pp. 1528-1533
摘要An analog-implemented time-difference amplifier applied for coarse-fine time-to-digital converters is presented in this paper. Implemented in 0.18-μm CMOS process, a time difference within 225 ps can be amplified 80× linearly under maximum frequency of 25 MHz. Measured maximum gain error is 4.1%. Measured output rms jitter is 84.5 ps under gain of 80×. The time amplifier consumes 1.7 mW under supply voltage of 1.8 V.
關鍵字Coarse-fine time-to-digital converter (TDC);TDC;time-difference amplifier (TA)
語言英文(美國)
ISSN1557-9999
期刊性質國外
收錄於SCI;EI;
產學合作
通訊作者Horng-Yuan Shih
審稿制度
國別美國
公開徵稿
出版型式,電子版
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