The novel efficient design of XOR/XNOR function for adder applications
學年 88
學期 1
發表日期 1999-09-05
作品名稱 The novel efficient design of XOR/XNOR function for adder applications
作品名稱（其他語言）
著者 Cheng, Kuo-hsing; Huang, Chih-sheng
作品所屬單位 淡江大學電機工程學系
出版者 N.Y.: Institute of Electrical and Electronic Engineers (IEEE)
會議名稱 Electronics, Circuits and Systems, 1999. Proceedings of ICECS '99. The 6th IEEE International Conference on
會議地點 Pafos, Cyprus
摘要 A new concept to implement high performance XOR/XNOR functions that using the pass transistor technique is proposed. It requires only six MOS transistors. Base upon this concept, a new high-speed full adder is proposed for low-power application. We used the modified Karnaugh map (K-map) method to obtain the various pass transistor circuits. We modified the Boolean expression to simplify the control and input signals of the pass transistor logic (PTL) to realize a one-bit full adder. The analysis of the proposed one-bit adders is compared with that of the static CMOS adder, the CPL transmission function adder, the DPL transmission gate adder, and the CPL transmission gate adder. The simulation results shows that the proposed new circuit has the lowest power delay product performance
關鍵字
語言 en
收錄於
會議性質 國際
校內研討會地點
研討會時間 19990905~19990908
通訊作者
國別 CYP
公開徵稿
出版型式 紙本
出處 Electronics, Circuits and Systems, 1999. Proceedings of ICECS '99. The 6th IEEE International Conference on (Volume:1 ), pp.29-32
相關連結

機構典藏連結 ( http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/38842 )

機構典藏連結