True-single-phase all-N-logic differential logic (TADL) for very high-speed complex VLSI
學年 84
學期 2
發表日期 1996-05-12
作品名稱 True-single-phase all-N-logic differential logic (TADL) for very high-speed complex VLSI
作品名稱（其他語言）
著者 Huang, Hong-yi; 鄭國興; Cheng, Kuo-hsing; Chu, Yuan-hua; Wu, Chung-yu
作品所屬單位 淡江大學電機工程學系
出版者 Institute of Electrical and Electronics Engineers (IEEE)
會議名稱 Circuits and Systems, 1996. ISCAS '96., Connecting the World., 1996 IEEE International Symposium on
會議地點 Atlanta, GA, USA
摘要 A family of new logic circuits, called true-single-phase all-N-logic differential logic (TADL), are proposed and analyzed. The logic circuits are designed with only NMOS devices in the logic tree. Two kinds of sensing techniques are used for improving the speed operation, namely, the balanced sense amplifier for the differential-input TADL and the unbalanced sense amplifier for the single-input TADL. A complex function can be implemented in a TADL gate and high operation speed can be achieved without dc power dissipation. Only a true-single-phase clock is required to form the fully pipelined systems. Simulation results show that circuits designed by the TADL have the advantages of high-speed operation and low power-delay product.
關鍵字
語言 en
收錄於
會議性質 國際
校內研討會地點
研討會時間 19960512~19960515
通訊作者
國別
公開徵稿
出版型式 紙本
出處 Circuits and Systems, 1996. ISCAS '96., Connecting the World., 1996 IEEE International Symposium on (Volume:4 ), pp.296-299
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