教師資料查詢 | 類別: 會議論文 | 教師: 鄭國興 CHENG KUO-HSING (瀏覽個人網頁)

標題:A new CMOS current-sensing complementary pass-transistor logic (CSCPTL) for high-speed low-voltage applications
學年83
學期2
發表日期1995/04/28
作品名稱A new CMOS current-sensing complementary pass-transistor logic (CSCPTL) for high-speed low-voltage applications
作品名稱(其他語言)
著者Wu, Chung-yu; 鄭國興; Cheng, Kuo-hsing; Lu, Jr-houng
作品所屬單位淡江大學電機工程學系
出版者Institute of Electrical and Electronics Engineers (IEEE)
會議名稱Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on
會議地點Seattle, WA, USA
摘要A new pass-transistor logic called the current-sensing complementary pass-transistor logic tree (CSCPTL) is proposed and investigated. The new logic circuit can be used in low-voltage low-power systems for high-speed applications. To examine the low-voltage applications, a 1.2 V supply voltage is selected for one battery back-up systems. The current-sensing scheme yields a good sensing speed with small voltage swing. The dc power dissipation of the current mode circuit makes it difficult to apply in low power applications. The new circuit can resolve the dc power problem in the current-sensing scheme. The new circuit has superior speed performance with a power-delay product comparable to LCPL which is acknowledged to have the most potential in low-voltage low-power digital circuits design. The CSCPTL can be operated at 1.2 V without changing the conventional 5 V CMOS process.
關鍵字
語言英文
收錄於
會議性質國際
校內研討會地點
研討會時間19950428~19950503
通訊作者
國別美國
公開徵稿
出版型式紙本
出處Circuits and Systems, {4}, 1995 IEEE International Symposium on (Volume:1 ), pp.25-28
相關連結
SDGs
Google+ 推薦功能,讓全世界都能看到您的推薦!