The charge-transfer feedback-controlled split-path CMOS buffer
學年 87
學期 2
出版（發表）日期 1999-03-01
作品名稱 The charge-transfer feedback-controlled split-path CMOS buffer
作品名稱（其他語言）
著者 Cheng, Kuo-hsing; Yang, Wei-bin; Huang, Hong-yi
單位 淡江大學電機工程學系
出版者 New York: Institute of Electrical and Electronics Engineers (IEEE)
著錄名稱、卷期、頁數 IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing 46(3), pp.346-348
摘要 Abstract—A new low-power high-speed CMOS buffer, called the charge-transfer feedback-controlled split-path (CFS) CMOS buffer, is proposed. By using the feedback-controlled split-path method, the shortcircuit current of the output inverter is eliminated. Four additional MOS transistors are used as the charge-transfer diodes, which can transfer the charge stored in the split output-stage driver to the output node. Thus the propagation delay and power dissipation of the CFS buffer are reduced. The HSPICE simulation results show that the power-delay product of the CFS CMOS buffer is a savings over 20% in comparison to a conventional CMOS tapper buffer at 100 MHz operation frequency.
關鍵字
語言 en
ISSN 1057-7130
期刊性質 國外
收錄於 SCI EI
產學合作
通訊作者
審稿制度
國別 USA
公開徵稿
出版型式
相關連結

機構典藏連結 ( http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/38856 )

機構典藏連結