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標題:Inductorless CMOS Receiver Front-End Circuits for 10-Gb/s Optical Communications
學年98
學期1
出版(發表)日期2009/12/01
作品名稱Inductorless CMOS Receiver Front-End Circuits for 10-Gb/s Optical Communications
作品名稱(其他語言)
著者Chen, Hsin-LiangChen, Chih-HaoYang, Wei-BinChiang, Jen-Shiun
單位淡江大學電機工程學系
出版者臺北縣淡江大學
著錄名稱、卷期、頁數淡江理工學刊=Tamkang Journal of Science and Engineering 12(4), pp.449-458
摘要In this paper, a 10-Gb/s inductorless CMOS receiver front end is presented, including a transimpedance amplifier and a limiting amplifier. The transimpedance amplifier incorporates Regulated Cascode (RGC), active-inductor peaking, and intersecting active feedback circuits to achieve a transimpedance gain of 56 dB and a bandwidth of 8.27 GHz with a power dissipation of 35 mW. The limiting amplifier employs interleaving active feedback to achieve a differential voltage gain of 44.5 dB and a bandwidth of 10.3 GHz while consuming 226 mW. Both circuits are realized in 0.18- m CMOS technology with a 1.8-V supply.
關鍵字Transimpedance Amplifier;Limiting Amplifier;Inducorless;Optical Communication
語言英文
ISSN1560-6686
期刊性質國內
收錄於EI;
產學合作
通訊作者Chen, Hsin-Liang
審稿制度
國別中華民國
公開徵稿
出版型式,紙本
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