教師資料查詢 | 類別: 期刊論文 | 教師: 李世安 Shih-An, Li (瀏覽個人網頁)

標題:Design of a shift-and-add based hardware accelerator for color space conversion
學年103
學期2
出版(發表)日期2015/06/01
作品名稱Design of a shift-and-add based hardware accelerator for color space conversion
作品名稱(其他語言)
著者Li, Shih-An; Chen, Ching-Yi; Chen, Ching-Han
單位淡江大學電機工程學系
出版者Heidelberg: Springer
著錄名稱、卷期、頁數Journal of Real-Time Image Processing 10(2), pp.193-206
摘要In this paper, a Nios II processor based hardware/software co-design architecture with high expandability and development flexibility is proposed. The architecture integrates a pipelined color space converter (CSC), hardware accelerator (HA), and a LCD touch module (LTM) HA, which facilitates a high-speed implementation of RGB to YCbCr color space conversion with a real-time image display. To avoid the inefficiency of CSC circuit architecture due to massive floating-point multiplication operations in the conversion formulae, a GA-based evolutionary technique is used to realize the fast multiplierless CSC hardware architecture. Meanwhile, a pipeline design method is further applied to enhance the maximum operating frequency in circuit design. As compared to the commonly used floating-point based CSC architecture, the pipelined CSC HA in this paper has excellent advantages of low-complexity and high speed. After the mechanism is integrated into a system-on-a-programmable-chip (SOPC), the maximum operating frequency reached 168.12 MHz. That is, in every 0.11 s, the color space conversion can process a 512 × 512 image. This excellent result is practical to the fast development of different kind of image/video processing systems.
關鍵字Hardware/software co-design;Color space converter;Hardware accelerator;SOPC
語言英文
ISSN1861-8200;1861-8219
期刊性質國外
收錄於SCI;
產學合作
通訊作者Chen, Ching-Yi
審稿制度
國別德國
公開徵稿
出版型式,電子版,紙本
相關連結
Google+ 推薦功能,讓全世界都能看到您的推薦!