教師資料查詢 | 類別: 期刊論文 | 教師: 詹益光 Yih-guang Jan (瀏覽個人網頁)

標題:Implemented LDO Chip with Output Capacitors Free
學年101
學期1
出版(發表)日期2013/01/01
作品名稱Implemented LDO Chip with Output Capacitors Free
作品名稱(其他語言)
著者Jan, Yih-Guang; Tseng, Hsien-Wei; Lee, Yang-Han; Huang, Chao-Chung; Yen, Liang-Yu
單位淡江大學電機工程學系
出版者Stafa-Zurich: Trans Tech Publications Ltd.
著錄名稱、卷期、頁數Applied Mechanics and Materials 284-287, pp.2521-2525
摘要In this paper the process of implementing a low dropout regulator (LDO) chip is presented; it is using uses Taiwan Semiconductor TSMC’s Manufacture Inc. 0.35um 2P4M process. The circuit designed with the described process can be is operated at 3-5V input voltage to generate 2.5V output voltage. Maximum output current can be running up to 200mA. This LDO is implemented without
placing output capacitors to reduce BOM (Bill of Material) cost and stable between 0~200mA loading
current and the chip is stable when the loading current is in the range 0~200mA. [8] The new
proposed LDO chip can be implemented in the handheld mobile devices, battery powered equipment,wireless devices, cordless phones, or PC peripherals.
關鍵字
語言英文(美國)
ISSN1660-9336
期刊性質國外
收錄於EI;
產學合作
通訊作者Tseng, Hsien-Wei
審稿制度
國別瑞士
公開徵稿
出版型式紙本
相關連結
Google+ 推薦功能,讓全世界都能看到您的推薦!