An Efficient Scheduling Algorithm Based On Multi-frequency TAM for SOC Testing
學年 96
學期 2
出版（發表）日期 2008-06-01
作品名稱 An Efficient Scheduling Algorithm Based On Multi-frequency TAM for SOC Testing
作品名稱（其他語言）
著者 Rau, Jiann-chyi; Wu, Po-han; Ma, Jia-shing
單位 淡江大學電機工程學系
出版者 Zographou: World Scientific and Engineering Academy and Society (W S E A S)
著錄名稱、卷期、頁數 WSEAS Transactions on Circuits And System 6(7), pp.558-568
摘要 In recent years the advance of CMOS technology has led to a great development, especially on the complexity of the system-on-chip (SOC). As the development of circuit with different technology, the embedded cores embedded into system-on-chips (SOCs) usually have multi-frequency to drive it. In this paper, we present a heuristic approach of TAM optimization according to the reality and reduce the test application time. The proposed method is applicable to the design model with hierarchy SOCs. We pay the price in hardware overhead in order to decrease test application time.
關鍵字 SOC; Testing; TAM
語言 en
ISSN 1109-2734
期刊性質 國外
收錄於 EI
產學合作
通訊作者 Rau, Jiann-chyi; Wu, Po-han; Ma, Jia-shing
審稿制度 是
國別 GRC
公開徵稿
出版型式 紙本
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