教師資料查詢 | 類別: 期刊論文 | 教師: 郭建宏 KUO, CHIEN-HUNG (瀏覽個人網頁)

標題:Multi-bit Delta-Sigma Modulator Using a Modified DWA Algorithm
學年91
學期1
出版(發表)日期2002/12/01
作品名稱Multi-bit Delta-Sigma Modulator Using a Modified DWA Algorithm
作品名稱(其他語言)
著者Kuo, Chien-hung; Hsueh, Tzu-chien; Liu, Shen-iuan
單位淡江大學電機工程學系
出版者New York: Springer New York LLC
著錄名稱、卷期、頁數Analog Integrated Circuits and Signal Processing 33(3), pp.289-300
摘要A four pointer data weighted averaging (FPDWA) algorithm is presented to reduce the nonlinearity of the feedback multi-bit digital-to-analog converter (DAC) for delta-sigma modulators. By utilizing the proposed algorithm, the noise power caused by element mismatch can be reduced. A nine-level second-order delta-sigma modulator has been implemented in a double-poly double-metal 0.35 μm CMOS process. Experimental results indicate the peak SNDR reaches 86.59 dB within bandwidth of 22 kHz. The maximum input amplitude is −7 dB below the full scale with 10-kHz input frequency, the sampling frequency is 5 MHz, and the OSR is around 113. The power consumption is 6.27 mW for a power supply of 3.3 V.
關鍵字
語言英文
ISSN0925-1030;1573-1979
期刊性質國外
收錄於SCI;EI;
產學合作
通訊作者
審稿制度
國別美國
公開徵稿
出版型式,紙本
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