關鍵字查詢 | 類別:會議論文 | | 關鍵字:Hardware/Software Co-design for Particle Swarm Optimization Algorithm

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序號 學年期 教師動態
1 99/1 電機系 李世安 副教授 會議論文 發佈 Hardware/Software Co-design for Particle Swarm Optimization Algorithm , [99-1] :Hardware/Software Co-design for Particle Swarm Optimization Algorithm會議論文Hardware/Software Co-design for Particle Swarm Optimization AlgorithmLi, Shih-an; Wong, Ching-chang; Yu, Chia-jun; Hsu, Chen-chien淡江大學電機工程學系Field Programmable Gate Array (FPGA);HW/SW Co-design;Particle swarm optimization (PSO);system on a programmable chip (SOPC)Institute of electrical and electronics engineers (IEEE)Proceedings of the IEEE International Conference on Systems, Man and Cybernetics, pp.3762-3767This paper presents a hardware/software (HW/SW) co-design approach using SOPC technique and pipeline design method to improve the performance of particle swarm optimization (PSO) for embedded applications. Based on modular design architecture, a particle updating accelerator module via hardware implementation for updating velocity and position of particles and a fitness evaluation module implemented on a soft-cored processor for evaluating the objective functions are respectively designed and work closely tog
2 99/1 電機系 翁慶昌 教授 會議論文 發佈 Hardware/Software Co-design for Particle Swarm Optimization Algorithm , [99-1] :Hardware/Software Co-design for Particle Swarm Optimization Algorithm會議論文Hardware/Software Co-design for Particle Swarm Optimization AlgorithmLi, Shih-an; Wong, Ching-chang; Yu, Chia-jun; Hsu, Chen-chien淡江大學電機工程學系Field Programmable Gate Array (FPGA);HW/SW Co-design;Particle swarm optimization (PSO);system on a programmable chip (SOPC)Institute of electrical and electronics engineers (IEEE)Proceedings of the IEEE International Conference on Systems, Man and Cybernetics, pp.3762-3767This paper presents a hardware/software (HW/SW) co-design approach using SOPC technique and pipeline design method to improve the performance of particle swarm optimization (PSO) for embedded applications. Based on modular design architecture, a particle updating accelerator module via hardware implementation for updating velocity and position of particles and a fitness evaluation module implemented on a soft-cored processor for evaluating the objective functions are respectively designed and work closely tog
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