會議論文
| 學年 | 91 |
|---|---|
| 學期 | 2 |
| 發表日期 | 2003-05-25 |
| 作品名稱 | A new robust handshake for asymmetric asynchronous micro-pipelines |
| 作品名稱（其他語言） | |
| 著者 | Cheng, Kuo-hsing; 李揚漢; Lee, Yang-han; Chang, Wei-chun |
| 作品所屬單位 | 淡江大學電機工程學系 |
| 出版者 | Institute of Electrical and Electronics Engineers (IEEE) |
| 會議名稱 | Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on |
| 會議地點 | Bangkok, Thailand |
| 摘要 | In this paper, a new handshake methodology to enhance the performance of the asynchronous micro-pipeline systems is proposed. The proposed handshake methodology has more flexibilities to design an asymmetric asynchronous micro-pipeline system. The proposed handshake methodology also has some advantages, like latch free, robust, high throughput, very short pre-charge time, less transistors, and more flexibility in asymmetry data path. A technique that combines a single-rail dynamic circuit with a dual-rail dynamic circuit was proposed and used to design in the data path. In the critical delay data paths, the dual-rail dynamic circuits were used to improve the operating speed. Others, the single-rail dynamic circuits were used. It brings some advantages that reduce power consumption and die area while maintaining the calculation speed. An asynchronous micro-pipeline array multiplier was designed and implemented by the new robust handshake methodology. Based on the TSMC 0.35μm CMOS technology, the simulation results show that the proposed new handshake methodology has shortest latency and more robust property as compare with other handshake methodologies. |
| 關鍵字 | |
| 語言 | en |
| 收錄於 | |
| 會議性質 | 國際 |
| 校內研討會地點 | |
| 研討會時間 | 20030525~20030528 |
| 通訊作者 | |
| 國別 | THA |
| 公開徵稿 | |
| 出版型式 | 紙本 |
| 出處 | Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on (Volume:5 ), pp.209-212 |
| 相關連結 |
機構典藏連結 ( http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/38589 ) |