會議論文
| 學年 | 84 |
|---|---|
| 學期 | 2 |
| 發表日期 | 1996-06-13 |
| 作品名稱 | A low-power current-sensing complementary pass-transistor logic (LCSCPTL) for low-voltage high-speed applications |
| 作品名稱（其他語言） | 低功率電流偵測互補式帶通電晶體邏輯及其在低電壓高速度之應用 |
| 著者 | 鄭國興; Cheng, Kuo-hsing; Liaw, Yii-yih |
| 作品所屬單位 | 淡江大學電機工程學系 |
| 出版者 | Institute of Electrical and Electronics Engineers (IEEE) |
| 會議名稱 | VLSI Circuits, 1996. Digest of Technical Papers., 1996 Symposium on |
| 會議地點 | Honolulu, HI, USA |
| 摘要 | Recently, power dissipation has become an important constraint in portable electronic systems. In this work, a new low-power current-sensing complementary pass-transistor logic (LCSCPTL) is proposed and analyzed. Since the current-sensing scheme can yield a fast sensing speed under small voltage swing compared to the voltage-sensing scheme, the new logic circuit can be used in the low-voltage low-power digital system for high speed applications. It is shown that the LCSCPTL has an operation speed about 2.2 to 2.6 times higher than the CPL, which is known to have a great potential in low-voltage low-power digital applications. Moreover, the LCSCPTL has less power dissipation than the CPL. These features make the LCSCPTL very promising in the applications of low-power low-voltage high-speed applications. Tile LCSCPTL can be operated at 1.2 V without changing conventional 5V CMOS process. |
| 關鍵字 | |
| 語言 | en |
| 收錄於 | |
| 會議性質 | 國際 |
| 校內研討會地點 | |
| 研討會時間 | 19960613~19960615 |
| 通訊作者 | |
| 國別 | USA |
| 公開徵稿 | |
| 出版型式 | |
| 出處 | VLSI Circuits, 1996. Digest of Technical Papers., 1996 Symposium on, pp.16-17 |
| 相關連結 |
機構典藏連結 ( http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/38854 ) |