期刊論文
學年 | 89 |
---|---|
學期 | 1 |
出版(發表)日期 | 2001-01-01 |
作品名稱 | A smart photonic ATM switch architecture with compression strategy |
作品名稱(其他語言) | |
著者 | Sheu, Shiann-tsong; Lee, Yang-han; Wu, Chih-chiang |
單位 | 淡江大學電機工程學系 |
出版者 | Piscataway: Institute of Electrical and Electronics Engineers(IEEE) |
著錄名稱、卷期、頁數 | Journal of Lightwave Technology 19(1), pp.1-10 |
摘要 | Generally, the limitations of optical delay line and link capacity limit the switching efficiency in the photonic asynchronous transfer mode (ATM) switch. Under the constraints, a smart photonic ATM switch designed for high-speed optical backbone network should have some fast switching strategies so that the congestion can be avoided or reduced. In this paper, we will propose a novel smart photonic ATM switch architecture with a novel compression strategy. In the smart architecture, while more than two frames are destined for the same destination, the losers will be queued and compressed to reduce the degree of congestion. Therefore, not only the total switching time (TST) can be reduced but also the scarce buffer is able to store more incoming cells. To meet the high-speed switching performance, a simple and efficient compression decision algorithm (CDA) is proposed. The timing of employing compression strategy and the saturated performance of proposed strategy are analyzed. Simulation results show that compared to the conventional photonic ATM switch without compression strategy, the proposed strategy offers a much better performance in terms of queueing delay. |
關鍵字 | |
語言 | en |
ISSN | 1558-2213 0733-8724 |
期刊性質 | 國外 |
收錄於 | SCI EI |
產學合作 | |
通訊作者 | |
審稿制度 | 否 |
國別 | TWN |
公開徵稿 | |
出版型式 | ,電子版,紙本 |
相關連結 |
機構典藏連結 ( http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/46373 ) |