期刊論文
學年 | 82 |
---|---|
學期 | 2 |
出版(發表)日期 | 1994-04-01 |
作品名稱 | A pairwise substitutional fault tolerance technique for the cube-connected cycles architecture |
作品名稱(其他語言) | |
著者 | Tzeng, Nian-feng; 莊博任; Chuang, Po-jen |
單位 | 淡江大學電機工程學系 |
出版者 | Piscataway: Institute of Electrical and Electronics Engineers (IEEE) |
著錄名稱、卷期、頁數 | IEEE Transactions on Parallel and Distributed Systems 5(4), pp.433-438 |
摘要 | With all of the salient features of hypercubes, the cube-connected cycles (CCC) structure is an attractive parallel computation network suited for very large scale integration (VLSI) implementation because of its layout regularity. Unfortunately, the classical CCC structure tends to suffer from considerable performance degradation in the presence of faults. The authors deal with a fault-tolerant CCC structure obtained by incorporating a spare PE in each cycle and by adding extra links among PE's to realize dimensional substitutes for failed PE's in the immediate lower dimension. A unique feature of this design lies in that a faulty PE and its laterally connected PE are always replaced at the same time by their immediate vertical successor pair, achieving pairwise substitution to elegantly maintain the rigid full CCC structure after faulty PE's arise. The proposed structure improves reliability substantially without incurring large overhead in layout area. This design is compared with earlier fault-tolerant CCC designs in terms of normalized reliability, which takes area overhead into account. An extension to this fault-tolerant structure is also discussed |
關鍵字 | |
語言 | en |
ISSN | 1045-9219 |
期刊性質 | 國外 |
收錄於 | |
產學合作 | |
通訊作者 | |
審稿制度 | |
國別 | USA |
公開徵稿 | |
出版型式 | 電子版 |
相關連結 |
機構典藏連結 ( http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/46244 ) |