期刊論文
| 學年 | 82 |
|---|---|
| 學期 | 1 |
| 出版（發表）日期 | 1993-10-01 |
| 作品名稱 | Creating disjoint paths in gamma interconnection networks |
| 作品名稱（其他語言） | |
| 著者 | Tzeng, Nian-feng; 莊博任; Chuang, Po-jen; Wu, Chwan-hwa |
| 單位 | 淡江大學電機工程學系 |
| 出版者 | Piscataway: Institute of Electrical and Electronics Engineers (IEEE) |
| 著錄名稱、卷期、頁數 | IEEE transactions on computers 42(10), pp.1247-1252 |
| 摘要 | The Gamma interconnection network (GIN) is composed of 3×3 basic building blocks, with interconnecting patterns between stages following the plus-minus-2i functions. The authors consider modifications to the GIN by altering the interconnecting patterns between stages so as to achieve high terminal reliability between any source-destination pair, resulting in the reliable GIN (REGIN). A type of REGIN's ensures totally disjoint paths in existence from any source to any destination, thereby capable of tolerating an arbitrary single fault. If several building blocks (i.e., 3×3 switches) are fabricated in one chip with very large scale integrated (VLSI) technology, the layout area and the pin count are less for the REGIN than for its GIN counterpart as a result of the change in the interconnecting patterns, giving rise to potential cost reduction. The terminal reliability of the REGIN is derived and compared with that of a compatible GIN. In addition, the performance of the REGIN is evaluated using simulation |
| 關鍵字 | |
| 語言 | en |
| ISSN | 0018-9340 |
| 期刊性質 | 國外 |
| 收錄於 | |
| 產學合作 | |
| 通訊作者 | |
| 審稿制度 | |
| 國別 | USA |
| 公開徵稿 | |
| 出版型式 | |
| 相關連結 |
機構典藏連結 ( http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/46209 ) |