期刊論文
| 學年 | 93 |
|---|---|
| 學期 | 1 |
| 出版（發表）日期 | 2004-09-01 |
| 作品名稱 | Dynamic Bias Circuits for Efficiency Improvement of RF Power Amplifier |
| 作品名稱（其他語言） | |
| 著者 | 余繁; Ye, Fun; Chiang, Jen-shiun; Chen, Chun-wen; Sung, Yu-chen |
| 單位 | 淡江大學電機工程學系 |
| 出版者 | 淡江大學 |
| 著錄名稱、卷期、頁數 | 淡江理工學刊=Tamkang journal of science and engineering 7(3), pp.183-188 |
| 摘要 | This work presents a dynamic gate bias circuit for bias control to maximize power added efficiency based on the class-A two-stage power amplifier. The proposed circuits are composed of two NMOS transistors, a capacitor for coupling RF input signal, and four resistors for bias. The circuit is implemented by means of the bias control at the two-stage power amplifier to improve the overall power added efficiency and delivers 22dBm output power at 2.4 GHz. The circuit can improve power efficiency and linearity for small RF signals. The simulation indicates that the efficiency is improved more than 100%, and at 0 dBm the input signal has 515dB of IMD3 improvement compared with that without dynamic bias circuit. The output power of 22dBm at the output stage can be applied to the transceivers of IEEE 802.11b and Bluetooth applications. |
| 關鍵字 | CMOS;Dynamic Bias Circuits;Linearity;Power Added Efficiency;Power Amplifie;RF |
| 語言 | en |
| ISSN | 1560-6686 |
| 期刊性質 | 國內 |
| 收錄於 | |
| 產學合作 | |
| 通訊作者 | |
| 審稿制度 | 否 |
| 國別 | TWN |
| 公開徵稿 | |
| 出版型式 | ,電子版 |
| 相關連結 |
機構典藏連結 ( http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/46134 ) |