| 113 / 1 |
An Integrator Time-Constant Calibration Scheme with Modified Voltage to Digital Converter
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#04.優質教育
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2025-03-05 |
| 112 / 2 |
A 14-Bit 260-kHz BW Second-Order NS SAR ADC with Signal Charge Redistribution Technique
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#04.優質教育
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2025-03-06 |
| 113 / 1 |
A Hybrid Flash and Incremental Analog-to-Digital Converter for Telemedicine Applications
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#04.優質教育
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2025-03-05 |
| 114 / 1 |
A 89.7dB SNDR Second-Order Noise-Shaping SAR ADC with Passive-Active Hybrid Loop Filter
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2025-09-30 |
| 114 / 1 |
A Low-Temperature Variation Reference Current Source with Digital Counting Auto-Calibration Scheme
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2026-03-11 |
| 114 / 1 |
A Process and Temperature Insensitive Two-Step VCO-Based ADC in 90nm CMOS
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2025-09-30 |