關鍵字查詢 | 類別:期刊論文 | 著者 | 關鍵字:Yu-lu

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序號 學年期 教師動態
1 107/2 化學系 謝仁傑 教授 期刊論文 發佈 Palladium-Catalyzed Dual Annulation: A Method for the Synthesis of Norneocryptolepine , [107-2] 著者:Li-Hsuan Yeh; Hung-Kai Wang; Gangaram Pallikonda; Yu-Lun Ciou; Jen-Chieh Hsieh
2 106/1 電機系 江正雄 教授 期刊論文 發佈 A current-controlled oscillator with temperature, voltage, and process compensation , [106-1] 著者:Wei-Bin Yang; Jen-Shiun Chiang; Ching-Tsan Cheng; Chi-Hsiung Wang; Horng-Yuan Shih; Jia-Liang Syu; Cing-Huan Chen; Yu-Lung Lo
3 106/1 數學系 張玉坤 教授 期刊論文 發佈 Effects of Aromatherapy Massage on Pregnant Women's Stress and Immune Function: A Longitudinal, Prospective, Randomized Controlled Trial , [106-1] 著者:Pao-Ju Chen, Cheng-Chen Chou, Luke Yang, Yu-Lun Tsai, Yue-Cune Chang, and Jen-Jiuan Liaw*
4 106/1 電機系 楊維斌 副教授 期刊論文 發佈 Design of Fast-Locked Digitally Controlled Low-Dropout Regulator for Ultra-low Voltage Input , [106-1] 著者:Wei‑Bin Yang; Yu-Yao Lin; Yu-Lung Lo
5 105/1 電機系 楊維斌 副教授 期刊論文 發佈 All-digital duty-cycle corrector with synchronous and high accuracy output for double date rate synchronous dynamic random-access memory application , [105-1] 著者:Chih-Wei Tsai; Yu-Lung Lo; Chia-Chen Chang; Han-Ying Liu; Wei-Bin Yang; Kuo-Hsing Cheng
6 106/1 電機系 楊維斌 副教授 期刊論文 發佈 A Fast-Lock and Low-Power DLL-Based Clock Generator Applied for DDR4 , [106-1] 著者:Yu-Lung Lo; Wei-Bin Yang; Han-Hsien Wang; Cing-Huan Chen; Zi-Ang Huang
7 106/1 電機系 楊維斌 副教授 期刊論文 發佈 Wide‑range CMOS reference clock generator with a dynamic duty cycle scaling mechanism at a 0.9‑V supply voltage , [106-1] 著者:Wei-Bin Yang; Yu-Lung Lo; Kuo-Ning Chang; Yu-Yao Lin
8 104/2 電機系 楊維斌 副教授 期刊論文 發佈 A High-Resolution All-Digital Temperature Sensor with Process Variation Compensation , [104-2] 著者:Yu-Lung Lo; Wei-Tsuen Chen; Yu-Ting Chiu; Wei-Bin Yang,
9 103/1 資管系 廖幼如 助理教授 期刊論文 發佈 Performance Evaluation of Oversea Convertible Bonds Issued in Taiwan. , [103-1] 著者:Yu-Lu Liao; Yen-Sen Ni
10 105/2 資管系 廖幼如 助理教授 期刊論文 發佈 Foreign Institutional Investors, Shareholding Change, and Corporate Governance , [105-2] 著者:Ni, Yen-sen; Liao, Yu-lu; Huang, Pao-yu
11 105/2 管科系 倪衍森 教授 期刊論文 發佈 Foreign Institutional Investors, Shareholding Change, and Corporate Governance , [105-2] 著者:Ni, Yen-sen; Liao, Yu-lu; Huang, Pao-yu
12 103/1 管科系 倪衍森 教授 期刊論文 發佈 Evaluating Overseas Convertible Bonds from Financial Statements Using Five Forces Analysis , [103-1] 著者:Yu-Lu Liao; Yen-Sen Ni
13 104/2 電機系 楊維斌 副教授 期刊論文 發佈 A High-Resolution All-Digital Temperature Sensor with Process Variation Compensation , [104-2] 著者:Yu-Lung Lo; Wei-Tsuen Chen; Yu-Ting Chiu; Wei-Bin Yang
14 101/2 水環系 高思懷 教授 期刊論文 發佈 The Effects of the Mechanical-Chemical Stabilization Process for Municipal Solid Waste Incinerator Fly Ash on the Chemical Reactions in Cement Paste , [101-2] 著者:Chen, Cheng-Gang; Sun, Chang-Jung; Gau, Sue-Huai; Wu, Ching-Wei; Chen, Yu-Lun
15 101/2 財金系 陳玉瓏 副教授 期刊論文 發佈 Trade Openness and Finance: Effects of Foreign Trade with China on Latin American Financial Development , [101-2] 著者:Chen, Yu-Lung; Emile, Etzer S.
16 104/1 管科系 廖述賢 教授 期刊論文 發佈 Comparison of competing models and multi-group analysis of organizational culture, knowledge transfer, and innovation capability: An empirical study of the Taiwan semiconductor industry , [104-1] 著者:Liao, Shu-hsien; Hu, Da-chian; Chen, Chih-Chiang; Lin, Yu-Lu
17 94/2 財金系 陳玉瓏 副教授 期刊論文 發佈 Clearing margin system in the futures markets—Applying the value-at-risk model to Taiwanese data , [94-2] 著者:Chiu, Chien-Liang; Chiang, Shu-Mei; Hung, Jui-Cheng; Chen, Yu-Lung
18 94/2 財金系 洪瑞成 教授 期刊論文 發佈 Clearing margin system in the futures markets—Applying the value-at-risk model to Taiwanese data , [94-2] 著者:Chiu, Chien-Liang; Chiang, Shu-Mei; Hung, Jui-Cheng; Chen, Yu-Lung
19 94/2 財金系 邱建良 教授 期刊論文 發佈 Clearing margin system in the futures markets—Applying the value-at-risk model to Taiwanese data , [94-2] 著者:Chiu, Chien-Liang; Chiang, Shu-Mei; Hung, Jui-Cheng; Chen, Yu-Lung
20 94/2 財金系 姜淑美 教授 期刊論文 發佈 Clearing margin system in the futures markets—Applying the value-at-risk model to Taiwanese data , [94-2] 著者:Chiu, Chien-Liang; Chiang, Shu-Mei; Hung, Jui-Cheng; Chen, Yu-Lung
21 96/2 資工系 陳俊豪 教授 期刊論文 發佈 Genetic-Fuzzy Data Mining with Divide-and-Conquer Strategy , [96-2] 著者:Hong, Tzung-pei; Chen, Chun-hao; Lee, Yeong-chyi; Wu, Yu-lung
22 94/2 資工系 陳俊豪 教授 期刊論文 發佈 A GA-based Fuzzy Mining Approach to Achieve a Trade-off Between Number of Rules and Suitability of Membership Functions , [94-2] 著者:Hong, Tzung-pei; Chen, Chun-hao; Wu, Yu-lung; Lee, Yeong-chyi
23 99/1 電機系 楊維斌 副教授 期刊論文 發佈 The High-Performance and Low-Power CMOS Output Driver Design , [99-1] 著者:Cheng, Ching-tsan; Wang, Chi-hsiung; Liao, Pei-hsuan; Yang, Wei-bin; Lo, Yu-lung
24 99/1 物理系 葉炳宏 教授 期刊論文 發佈 Low Resistivity Metal Silicide Nanowires with Extraordinarily High Aspect Ratio for Future Nanoelectronic Devices , [99-1] 著者:Chen, Sheng-Yu; Yeh, Ping-Hung; Wu, Wen-Wei; Chen, Uei-Shin; Chueh, Yu-Lun; Yang, Yu-Chen; Gwo, Shangir; Chen, Lih-Juann
25 98/2 電機系 楊維斌 副教授 期刊論文 發佈 A Pseudo Fractional-N Clock Generator with 50% Duty Cycle Output , [98-2] 著者:Yang, Wei-Bin; Lo, Yu-Lung; Chao, Ting-Sheng
26 97/2 電機系 楊維斌 副教授 期刊論文 發佈 High-Speed and Ultra-Low-Voltage Divide-by-4/5 Counter for Frequency Synthesizer , [97-2] 著者:Lo, Yu-lung; Yang, Wei-bin; Chao, Ting-sheng; Cheng, Kuo-hsing
27 97/2 電機系 楊維斌 副教授 期刊論文 發佈 Designing an Ultralow-Voltage Phase-Locked Loop Using a Bulk-Driven Technique , [97-2] 著者:Lo, Yu-lung; Yang, Wei-bin; Chao, Ting-sheng; Cheng, Kuo-hsing
[第一頁][上頁]1[次頁][最末頁]目前在第 1 頁 / 共有 27 筆查詢結果