期刊論文
| 學年 | 100 |
|---|---|
| 學期 | 1 |
| 出版（發表）日期 | 2011-10-01 |
| 作品名稱 | Hardware/software co-design for particle swarm optimization algorithm |
| 作品名稱（其他語言） | |
| 著者 | Li, Shih-An; Hsu, Chen-Chien; Wong, Ching-Chang; Yu, Chia-Jun |
| 單位 | 淡江大學電機工程學系 |
| 出版者 | Philadelphia: Elsevier Inc. |
| 著錄名稱、卷期、頁數 | Information Sciences 181(20), pp.4582–4596 |
| 摘要 | This paper presents a hardware/software (HW/SW) co-design approach using SOPC technique and pipeline design method to improve design flexibility and execution performance of particle swarm optimization (PSO) for embedded applications. Based on modular design architecture, a Particle Updating Accelerator module via hardware implementation for updating velocity and position of particles and a Fitness Evaluation module implemented either on a soft-cored processor or Field Programmable Gate Array (FPGA) for evaluating the objective functions are respectively designed to work closely together to carry out the evolution process at different design stages. Thanks to the design flexibility, the proposed approach can tackle various optimization problems of embedded applications without the need for hardware redesign. To further improve the execution performance of the PSO, a hardware random number generator (RNG) is also designed in this paper in addition to a particle re-initialization scheme to promote exploration search during the optimization process. Experimental results have demonstrated that the proposed HW/SW co-design approach for PSO algorithms has good efficiency for obtaining high-quality solutions for embedded applications. |
| 關鍵字 | HW/SW co-design; Particle swarm optimization (PSO); System on a programmable chip (SOPC); Field Programmable Gate Array (FPGA) |
| 語言 | en |
| ISSN | 0020-0255 |
| 期刊性質 | 國外 |
| 收錄於 | SCI |
| 產學合作 | |
| 通訊作者 | Li, Shih-An; Hsu, Chen-Chien |
| 審稿制度 | |
| 國別 | USA |
| 公開徵稿 | |
| 出版型式 | 紙本 |
| 相關連結 |
機構典藏連結 ( http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/61031 ) |