| 099 / 1 |
High-Speed and Ultra-Low-Voltage Divide-by-4/5 Counter for Frequency Synthesizer
|
#04.優質教育 #17.夥伴關係
|
2011-06-09 |
| 098 / 1 |
Designing an UltraLow-Voltage Phase-Locked Loop Using a Bulk-Driven Technique
|
#04.優質教育 #09.產業創新與基礎設施
|
2011-06-09 |
| 100 / 1 |
A Pseudo Fractional-N Clock Generator with 50% Duty Cycle Output
|
#04.優質教育 #08.尊嚴就業與經濟發展
|
2012-10-23 |
| 101 / 1 |
High Efficiency Concurrent Embedded Block Coding Architecture for JPEG 2000
|
#04.優質教育 #17.夥伴關係
|
2013-05-15 |
| 101 / 1 |
A 0.5V 320MHz 8 bit x 8 bit pipelined multiplier in 130nm CMOS process
|
#04.優質教育 #09.產業創新與基礎設施
|
2013-05-15 |
| 102 / 1 |
A Synthesizable Pseudo Fractional-N Clock Generator with
Improved Duty Cycle Output
|
#04.優質教育 #09.產業創新與基礎設施
|
2014-07-16 |
| 103 / 1 |
A multiple frequency clock generator using wide operation frequency range phase interpolator
|
#04.優質教育 #08.尊嚴就業與經濟發展
|
2015-03-13 |
| 104 / 1 |
A new phase interpolator circuit for frequency multiplication design in embedded system
|
#01.消除貧窮 #04.優質教育
|
2016-09-03 |
| 105 / 1 |
A High-Resolution All-Digital Temperature Sensor with Process Variation Compensation
|
#03.良好健康和福祉 #04.優質教育
|
2017-05-18 |
| 106 / 1 |
A 25 MHz crystal less clock generator with background calibration against process and temperature variation
|
#04.優質教育 #09.產業創新與基礎設施
|
2018-07-26 |
| 107 / 1 |
Wide‑range CMOS reference clock generator with a dynamic duty cycle scaling mechanism at a 0.9‑V supply voltage
|
#04.優質教育 #08.尊嚴就業與經濟發展
|
2019-02-20 |
| 108 / 1 |
A Fast-Lock and Low-Power DLL-Based Clock Generator Applied for DDR4
|
#04.優質教育 #17.夥伴關係
|
2020-04-15 |
| 108 / 1 |
Design of Fast-Locked Digitally Controlled Low-Dropout Regulator for Ultra-low Voltage Input
|
#04.優質教育 #08.尊嚴就業與經濟發展
|
2020-04-15 |
| 108 / 1 |
A Selectable Discrete-Voltage Output and Fast-Settling Low-Dropout Regulator Using Half Digitally-Assistant Voltage Accelerator
|
#04.優質教育 #09.產業創新與基礎設施
|
2020-04-15 |
| 108 / 1 |
All-digital duty-cycle corrector with synchronous and high accuracy output for double date rate synchronous dynamic random-access memory application
|
#04.優質教育 #09.產業創新與基礎設施
|
2020-04-15 |
| 109 / 1 |
A Fast Transient Response and High Current Efficiency Output-Capacitorless Low Dropout Regulator for Low-Power SoC Applications
|
#04.優質教育 #08.尊嚴就業與經濟發展
|
2021-03-23 |
| 110 / 1 |
A fast-locking all-digital PLL with dynamic loop gain control and phase self-alignment mechanism for sub-GHz IoT applications
|
|
2021-12-15 |
| 111 / 1 |
Asynchronous Digital Low-Dropout Regulator with Dual Adjustment Mode in Ultra-Low Voltage Input
|
|
2023-11-29 |
| 112 / 1 |
A Programmable Multiple Frequencies Clock Generator with Process and Temperature Compensation Circuit for System on Chip Design
|
|
2024-01-06 |